In-Register Computing Cells for Lower Memory Access Latency
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Solution Overview
Problem
Existing register designs in CPUs are limited by memory access speed, leading to inefficiencies in data processing and program execution speed.
Innovation Solution
An in-register computing (IRC) device with a register module that allocates register cells into input, weight, and output areas, utilizing IRC cells for operations and an addition device for result accumulation, optimizing resource allocation and operation control.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If data is fetched from memory into register for processing, then data processing can be performed, but memory access latency reduces overall efficiency
Solution Approach 1:
The patent combines storage and computation functions into a single register cell structure. The IRC cell integrates both data storage capability and in-register computation capability, eliminating the need to fetch data from memory for simple operations. This merging allows data to be processed directly within the register without external memory access, thereby reducing memory access latency while maintaining data processing efficiency.
2Productivity
If multiple data fetches and stores between memory and register are performed, then calculations can be completed, but the number of instructions increases
Solution Approach 1:
The IRC cell provides multi-functionality by integrating storage, computation, and accumulation operations within a single register cell. This universal design allows the same hardware structure to perform multiple operations that traditionally required separate instructions and memory accesses, thereby reducing the total number of instructions needed to complete calculations while maintaining high calculation completion speed.
3Productivity
If traditional register operations are used, then data can be stored and retrieved, but resource allocation efficiency is reduced
Solution Approach 1:
The patent merges storage and computation resources into a unified IRC cell structure. By combining what were previously separate resources (storage registers and computation units) into an integrated cell that can both store data and perform computations, the system achieves more efficient resource allocation. This reduces resource utilization overhead while maintaining high productivity, as the same physical structure serves multiple purposes without requiring additional separate components.
Data Source
AI summary
An in-register computing (IRC) device includes: a register module including a register bank and an addition device, the register bank including register cells, the register cells including IRC cells, wherein the register module is configured to allocate first of the register cells to an input area, second of the register cells to a weight area, and third of the register cells to an output area, wherein the input area is an area in which the register bank stores an input value, the weight area is an area including one of the IRC cells configured to perform an IRC operation between the input value and a weight value, and the output area is an area configured to store an output value obtained by performing an addition operation on an operation result of the IRC operation using an addition device.