In-Storage Processing Circuit for Host Throughput Bottlenecks
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Solution Overview
Problem
Related art computing systems face throughput bottlenecks due to data processing burden on the host when using hardware accelerators, necessitating an improved system and method for accelerated data processing.
Innovation Solution
Incorporating a processing circuit, such as an FPGA, directly within the storage device, allowing data processing to occur within the storage device itself, thereby reducing the need for data movement and utilizing the same physical interface and protocol as the storage controller.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If data is processed by a hardware accelerator connected to the host, then data processing capability is improved, but the host becomes burdened and throughput bottlenecks occur
Solution Approach 1:
The processing circuit is extracted from the host system and integrated directly into the storage device. This allows data processing to occur at the storage device level without burdening the host, while still providing hardware-accelerated processing capabilities. The processing circuit handles data processing tasks locally, extracting the computational burden from the host system.
Solution Approach 2:
The processing circuit acts as an intermediary between the storage controller and external systems. It receives data from the storage controller through the same physical interface, processes the data locally, and returns results without requiring host intervention. This intermediary approach enables accelerated processing while keeping the host system simple and unburdened.
2Productivity
If a processing circuit is integrated within the storage device, then data processing efficiency is improved by minimizing data transfers, but the device structure becomes more complex
Solution Approach 1:
The processing circuit is merged with the storage device architecture, integrating processing capabilities directly into the storage system. This merging eliminates the need for separate data transfer steps between storage and processing units, allowing data to be processed in-place within the storage device, thereby improving efficiency while managing structural complexity through integration.
Solution Approach 2:
The processing circuit is designed to handle multiple data processing tasks and operations within the storage device. By creating a multi-functional processing unit that can perform various computational operations, the design achieves high processing efficiency without proportionally increasing device complexity, as a single versatile processing circuit serves multiple purposes.
3Ease of operation
If the processing circuit uses the same physical interface and protocol as the storage controller, then ease of operation is improved, but interface contention may occur
Solution Approach 1:
The processing circuit and storage controller both access the same physical interface, enabling continuous data flow from the interface through the storage controller to the processing circuit without requiring data to be written to intermediate buffers or undergo additional transfer steps. This continuous action approach maintains interface compatibility while maximizing throughput by eliminating idle periods and redundant transfers.
Solution Approach 2:
The processing circuit independently manages its own data access through the shared physical interface using the same protocol as the storage controller. It can autonomously initiate and complete data processing operations without requiring complex arbitration or control mechanisms, thereby maintaining ease of operation while efficiently utilizing interface bandwidth through self-managed access.
Data Source
AI summary
A storage device. In some embodiments the storage device includes a storage controller; a nonvolatile memory device connected to the storage controller through a first physical interface, and a processing circuit. The processing circuit may be connected, through a second physical interface, to the storage controller or to the nonvolatile memory device, the second physical interface being the same as the first physical interface.