Electrically Inactive Via for Electromigration Reliability
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Solution Overview
Problem
As semiconductor devices shrink, electromigration issues arise due to higher current passing through smaller trenches and vias, leading to void formation and migration, which can cause device failure by increasing resistance and blocking conduction.
Innovation Solution
The implementation of isolated conductive regions, such as electrically isolated vias, positioned between cathode and anode portions of metal lines, creates flux divergence points that mitigate tensile stress and prevent void formation or nucleation by reducing the distance over which tensile stress exceeds critical levels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If device sizes are shrunk to enable fast operational speeds and higher densities, then operational speed and device density are improved, but electromigration issues worsen due to higher current passing through smaller trenches and vias
Solution Approach 1:
An electrically isolated via is introduced as an intermediary element between the cathode and anode portions of the metal line. This isolated via does not carry current but creates flux divergence positions that mitigate tensile stress in the metal line, thereby preventing void formation while allowing the device to maintain high density and operational speed
Solution Approach 2:
The continuous metal line is effectively segmented by the isolated via into multiple shorter segments. Each segment has reduced length, which reduces the cumulative tensile stress and prevents void formation. The isolated via acts as a stress relief point without disrupting the electrical continuity of the main current path
2Reliability
If current density is increased in smaller vias to maintain conduction, then electrical connectivity is maintained, but void formation increases due to electromigration
Solution Approach 1:
The electrically isolated via serves as a mediator that influences the stress distribution in the metal line without carrying current itself. By creating flux divergence positions, it reduces tensile stress and prevents void formation in the active current-carrying vias, thereby maintaining connectivity while eliminating the harmful void formation effect
3Reliability
If tensile stress is reduced in metal lines to prevent void formation, then void nucleation is mitigated, but the structural integrity and stress distribution may be affected
Solution Approach 1:
The isolated via creates localized flux divergence positions at specific points along the metal line. This locally modifies the stress distribution by creating stress relief zones at the isolated via locations, reducing tensile stress where it would otherwise accumulate and cause void formation, while preserving the overall structural integrity of the metal line
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively prevents void formation and migration during electron conduction, ensuring stable operation and extending the lifespan of semiconductor devices by maintaining conductive pathways and reducing the risk of device failure.
Implementation Method 1
Electromigration is the movement of conductive or metal ions as a result of current passing there through. In, for example, copper vias, electromigration can cause copper ions to migrate and result in formation of void regions within the copper vias.
Data Source
AI summary
A semiconductor device 300 includes a metal line 304 formed in a first dielectric layer 302. A capping layer 306 is formed the metal line 304. A second dielectric layer 308 is formed over the first dielectric layer 302 and the metal line 304. A first via 310 is formed in the second dielectric layer 308 and in contact with the metal line 304. A second via 312 is formed in the second dielectric layer 308 and in contact with the metal line 304, and is positioned a distance away from the first via 310. An electrically isolated via 326 is formed in the second dielectric layer 308 and in contact with the metal line 304 and in between the first via 310 and the second via 312. A third dielectric layer 314 is formed over the second dielectric layer 308. First and second trenches 316, 318 are formed in the third dielectric layer 314 and in contact with the first via 310 and the second via 312, respectively. An isolated trench 328 is formed in the third dielectric layer and in contact with the isolated via 326. The isolated via 326 mitigates void formation and/or void migration during operation/conduction with electrons traveling from the first trench 316 to the second trench 318 via the metal line 304.