InAlN Barrier Epitaxial Substrate for Normally-Off GaN Devices
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Solution Overview
Problem
Existing semiconductor devices based on group-III nitride semiconductors face challenges in achieving normally-off operation with low on-resistance and high gate voltage range, as methods like reducing barrier layer thickness or using recess etching are complex and do not ensure low on-resistance or high electron mobility.
Innovation Solution
An epitaxial substrate with a channel layer made of Inx1Aly1Gaz1N and a barrier layer made of Inx2Aly2Gaz2N, where x1=0 and 0≦y1≦0.3, and x2+y2+z2=1, with a thickness of 3 nm or less, and a low-crystallinity insulating layer of silicon nitride, along with a sub insulating layer and spacer layer, to enhance two-dimensional electron gas concentration and mobility.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the thickness of the barrier layer is reduced to increase two-dimensional electron gas concentration, then the electron concentration increases, but the manufacturing precision and reliability deteriorate due to difficulty in controlling such a thin layer
Solution Approach 1:
The patent changes the material composition parameters of the barrier layer by introducing InAlN with specific In and Al mole fractions (0 < x2 < 1, 0 < y2 < 1-x2) to achieve the desired electron concentration while maintaining manufacturable thickness (2-5 nm). This compositional parameter adjustment allows achieving high electron concentration without relying solely on extreme thickness reduction
Solution Approach 2:
The patent uses composite InAlN barrier layer material combining InN and AlN components to achieve optimal electronic properties. The composite structure with specific composition ratios provides both high electron concentration and sufficient layer stability for manufacturing control, resolving the contradiction between thinness and controllability
2Ease of operation
If recess etching is performed to achieve normally-off operation, then the gate threshold voltage becomes positive, but the device complexity and manufacturing difficulty increase
Solution Approach 1:
The patent extracts and eliminates the complex recess etching step from the manufacturing process. Instead, it achieves normally-off operation through material composition design (InAlN barrier layer with specific x2, y2 values) and thickness control, thereby obtaining positive gate threshold voltage without adding structural complexity or processing difficulty
Solution Approach 2:
The patent changes the material parameters (composition and thickness) of the barrier layer to directly achieve the desired electrical characteristics (positive threshold voltage for normally-off operation) without requiring additional structural modifications like recess etching, thus simplifying the device structure and manufacturing process
3Quantity of substance
If the AlN mole fraction in the barrier layer is increased to increase two-dimensional electron gas concentration, then the electron concentration and power density improve, but the strain and manufacturing difficulty increase
Solution Approach 1:
The patent optimizes the composition parameters of the barrier layer by using InAlN with controlled In mole fraction (x2) and Al mole fraction (y2), where the combination provides high electron concentration while managing strain. The specific composition range (0 < x2 < 1, 0 < y2 < 1-x2) balances electronic performance with mechanical stability, avoiding excessive strain that would complicate manufacturing
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution achieves a semiconductor device with high two-dimensional electron concentration, low sheet resistance, and normally-off operation with a positive gate threshold voltage and high upper gate voltage limit without the need for complex processing steps.
Implementation Method 1
a high-concentration two-dimensional electron gas (2DEG) to occur in a lamination interface (hetero interface) due to the large polarization effect (a spontaneous polarization effect and a piezo polarization effect) specific to a nitride material
Implementation Method 2
a buffer layer, a channel layer, and a barrier layer are epitaxially formed on a base substrate
Data Source
AI summary
Provided is a semiconductor device of normally-off operation type having a low on-resistance. An epitaxial substrate for it includes: a base substrate; a channel layer made of a first group-III nitride having a composition of Inx1Aly1Gaz1N at least containing Al and Ga and x1=0 and 0≦y1≦0.3; and a barrier layer made of a second group-III nitride having a composition of Inx2Aly2Gaz2N at least containing In and Al. The composition of the second group-III nitride is, in a ternary phase diagram for InN, AlN, and GaN, in a certain range that is determined in accordance with the composition of the first group-III nitride. The barrier layer has a thickness of 3 nm or less. A low-crystallinity insulating layer is further formed on the barrier layer. The low-crystallinity insulating layer is made of silicon nitride and has a thickness of 3 nm or less.