InCheck Lightweight Checkpointing for Soft Error Resilience
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Solution Overview
Problem
Existing software techniques for soft error resilience in microprocessor-based devices are inadequate for high-critical applications due to high recovery latency and memory overhead, and are not effective in detecting and recovering from latent errors, especially in real-time and interactive applications.
Innovation Solution
A lightweight checkpoint technique called InCheck provides verified register preservation and single memory-location checkpointing, enabling safe and timely recovery from soft errors by re-executing only the affected basic block, reducing recovery latency and memory overhead.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If full-system checkpoints are built during application execution to enable recovery from soft errors, then error detection and recovery capability is improved, but performance overhead becomes unacceptable due to frequent checkpoints required for latent error detection
Solution Approach 1:
The patent segments the checkpointing process from full-system to basic-block level. Instead of checkpointing entire system state frequently, it creates lightweight checkpoints only at basic block boundaries, capturing minimal state information (register values and program counter). This segmentation reduces the overhead of checkpoint creation while maintaining the ability to detect and recover from latent errors that occur between checkpoints.
Solution Approach 2:
The patent extracts only the essential state information needed for recovery (register values and program counter) from the complete system state. By taking out only these critical elements rather than preserving full system state, the checkpoint size and creation overhead are dramatically reduced, enabling frequent checkpoints without unacceptable performance penalty.
2Reliability
If frequent checkpoints are performed to detect latent errors, then error detection capability is improved, but recovery latency increases to half of application execution time
Solution Approach 1:
The patent segments the recovery process to only re-execute the specific basic block where an error was detected, rather than restarting the entire application. This granular recovery approach reduces recovery latency from half the application execution time to merely the duration of one basic block, while frequent lightweight checkpoints maintain latent error detection capability.
3Ease of manufacture
If software checkpoint techniques are used instead of hardware solutions, then cost and flexibility are improved, but error resiliency is insufficient for high-critical applications
Solution Approach 1:
The patent implements a feedback mechanism where error detection results from executing a basic block feed back into the decision to re-execute that block. When an error is detected, the system automatically triggers re-execution of the affected basic block and verifies correctness by comparing results. This closed-loop feedback enables software-only techniques to achieve high error resiliency previously only attainable with hardware solutions.
Solution Approach 2:
The patent performs preliminary error detection by executing basic blocks and checking for errors before proceeding to recovery actions. By detecting errors early at basic block boundaries and immediately initiating re-execution, the system prevents error propagation and ensures correctness before moving forward, achieving high reliability through proactive error handling.
Data Source
AI summary
Systems and methods for implementing a lightweight checkpoint technique for resilience against soft errors are disclosed. The technique provides effective, safe, and timely soft error detection and recovery using software. In an exemplary aspect, resilience against data flow errors and control flow errors is provided in critical or mixed-critical applications in each basic block or at critical basic blocks. Verified register preservation is provided at each basic block, along with memory preservation checkpoints. In this manner, soft errors are quickly detected and addressed. The register and memory preservation further allows for safe re-execution from recoverable soft errors. Control flow errors can also be detected at the beginning and/or end of each basic block.


