Inclined Semiconductor Stack Package With Planar Rewiring
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Solution Overview
Problem
Existing semiconductor stack packages face performance defects and increased wire sweeping risk due to vertical wire bonding in stacked structures, limiting integration and reliability.
Innovation Solution
A semiconductor stack package design featuring a base substrate with inclined surfaces and a rewiring structure, where semiconductor packages are stacked on inclined surfaces with flush cut surfaces, and a rewiring pattern connected to fan-out wiring, reducing defects by oblique cutting and exposing the rewiring pattern.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If vertical wire bonding is used to electrically connect stacked semiconductor chips, then electrical connection between chips is achieved, but wire sweeping risk increases
Solution Approach 1:
The patent transitions from vertical wire bonding to a planar rewiring structure by cutting the stacked chips at an oblique angle. This dimensional change allows the rewiring pattern to be formed on the exposed inclined surface, eliminating the need for vertical wire bonds and reducing wire sweeping risk while maintaining electrical connectivity.
Solution Approach 2:
The patent extracts and eliminates the vertical wire bonding process by using oblique cutting to expose the rewiring pattern directly on the chip surface. This removes the harmful wire sweeping risk associated with vertical wire bonds while preserving the essential electrical connection function through the exposed rewiring pattern.
2Adaptability or versatility
If multiple stacking steps are repeated to increase integration, then degree of integration improves, but wire sweeping risk increases
Solution Approach 1:
The patent applies oblique cutting to create an inclined surface that exposes the rewiring pattern, enabling planar electrical connections instead of vertical wire bonds. This approach allows multiple stacking steps to be performed without increasing wire sweeping risk, as each stack can be independently processed with the same oblique cutting and rewiring methodology.
3Reliability
If oblique cutting is used to expose rewiring pattern, then wire bonding defects are reduced, but manufacturing complexity increases
Solution Approach 1:
The patent extracts the rewiring pattern from the interior of the stacked chips by oblique cutting, exposing it on the inclined surface. This eliminates the need for complex vertical wire bonding processes and reduces manufacturing complexity overall, despite adding the oblique cutting step, because it simplifies the electrical connection methodology.
4Adaptability or versatility
If semiconductor packages of various sizes are included, then adaptability improves, but process standardization becomes difficult
Solution Approach 1:
The patent employs a universal oblique cutting process that can be applied to semiconductor packages of various sizes. The same cutting angle and rewiring methodology work across different package dimensions, maintaining process standardization while accommodating size variability. This universal approach allows the manufacturing process to handle diverse package sizes without requiring separate specialized processes.
Data Source
AI summary
Example embodiments relate to a semiconductor stack package. The semiconductor stack package may include a semiconductor stack structure including a plurality of semiconductor packages having a fan-out wiring and a base substrate having an inclined surface supporting the plurality of semiconductor packages, and a rewiring structure on the semiconductor stack structure and having a rewiring pattern that is connected to the fan-out wiring, wherein the plurality of semiconductor packages are stacked on the inclined surface, and an inclined cut surface of each semiconductor package is flush with an upper surface of the semiconductor stack structure