Incremental Circuit Synthesis via Partition Reuse
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Solution Overview
Problem
Conventional integrated circuit design systems face inefficiencies in incremental synthesis, requiring significant processing time and unpredictable results due to the need for re-synthesizing entire modified circuit designs, and manual partitioning and constraint management.
Innovation Solution
A method that performs incremental synthesis by reusing assets from a prior synthesis process, specifically partitioning and technology mapping, to generate a synthesized version of a modified circuit design, reducing computational overhead and maintaining predictable Quality of Results (QOR).
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the entire modified circuit design is re-synthesized using conventional tools, then the synthesis is complete and covers all changes, but the runtime is significant and results are unpredictable
Solution Approach 1:
The circuit design is divided into multiple partitions, where each partition is synthesized independently. The synthesis tool identifies unchanged partitions from the previous design and only performs detailed synthesis on modified partitions, while reusing synthesis results for unchanged partitions. This segmentation approach maintains complete coverage of all changes while significantly reducing overall synthesis runtime.
2Loss of time
If manual partitioning is performed to reduce synthesis time, then runtime may be reduced, but the process becomes complex and requires manual constraint management
Solution Approach 1:
The synthesis tool automatically performs partitioning and identifies unchanged partitions without requiring manual intervention. The tool autonomously manages the partitioning process, constraint generation, and synthesis coordination, eliminating the need for manual constraint management while achieving reduced synthesis runtime through intelligent partition identification and reuse.
3Productivity
If incremental synthesis reuses partitions from prior synthesis, then runtime is reduced and cell/net reuse increases, but the approach requires sophisticated partition management
Solution Approach 1:
The synthesis tool performs preliminary analysis to identify unchanged partitions before executing the full synthesis process. By pre-identifying which partitions can be reused from the previous design, the tool avoids redundant synthesis work on unchanged portions while automatically managing the complexity of partition coordination, constraint application, and result integration throughout the synthesis process.
Data Source
AI summary
Incremental synthesis for changes to a circuit design can include synthesizing, using computer hardware, a first circuit design resulting in a partitioning of the first circuit design and a plurality of synthesized partitions of the first circuit design and, for a second circuit design that is a modified version of the first circuit design and based upon the partitioning of the first circuit design, determining, using the computer hardware, a partition of the second circuit design that differs from the first circuit design. The partition of the second circuit design can be technology mapped using the computer hardware resulting in a synthesized partition of the second circuit design. A synthesized circuit design corresponding to the second circuit design can be generated using the computer hardware by combining synthesized partitions of the plurality of synthesized partitions of the first circuit design that are unchanged relative to the second circuit design with the synthesized partition of the second circuit design.