Incremental SAR ADC Noise Shaping for High-Resolution Conversion
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Solution Overview
Problem
Current analog to digital converters (ADCs) face challenges in achieving reduced power consumption, increased precision, and reduced circuit area while maintaining high resolution, especially in sensor devices.
Innovation Solution
The implementation of an incremental ADC with a successive approximation register (SAR) quantizer and a feedback loop for noise shaping, along with a two-step quantization process that includes residual error quantization, enhances the precision and resolution of the output signal. This involves a loop filter for initial signal processing, an SAR quantizer for intermediate digitization, and a digital filter for noise reduction, followed by a second quantization step with a lower reference voltage to increase overall resolution.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional ADC circuits are implemented on silicon chips, then analog signals can be converted to digital format, but power consumption is high and precision is limited
Solution Approach 1:
The conversion process is divided into two stages: a first quantization stage with coarser resolution and a second quantization stage with finer resolution. This segmentation allows the system to achieve high precision without requiring a single high-power quantizer to operate at full precision throughout, thereby reducing overall power consumption while maintaining conversion accuracy.
Solution Approach 2:
The first quantization stage performs preliminary conversion of the analog signal to digital format with moderate precision. This preliminary action removes the bulk of the signal range, allowing the second stage to focus only on the residual error with finer precision, reducing the power required for high-precision conversion.
2Measurement precision
If high resolution ADC circuits are implemented, then conversion precision increases, but circuit area increases
Solution Approach 1:
The high-resolution conversion is achieved by segmenting the quantization process into two stages with different resolutions. The first stage uses a coarser quantizer requiring fewer circuit resources, while the second stage uses a finer quantizer that processes only the residual error. This segmentation allows high overall resolution to be achieved without requiring a single large high-resolution quantizer, thereby reducing total circuit area.
Solution Approach 2:
Instead of using a single quantizer that performs excessive high-precision conversion across the entire signal range, the system applies partial high-precision conversion only to the residual error after the first stage. This partial action approach achieves the necessary output resolution with significantly reduced circuit resources.
3Measurement precision
If single-stage quantization is used, then circuit structure is simple, but precision and resolution are limited
Solution Approach 1:
The quantization process is segmented into two distinct stages: a first quantization stage that converts the analog signal to digital format with coarser resolution, and a second quantization stage that processes the residual error with finer resolution. This segmentation enables higher overall precision by combining the outputs of both stages, while keeping each individual stage relatively simple in structure.
Solution Approach 2:
The system employs feedback by feeding the output of the first quantization stage back into the conversion process to generate a residual error signal. This residual error is then processed by the second quantization stage. The feedback mechanism allows the two stages to work together synergistically, achieving high precision through their combined output while maintaining manageable complexity in each stage.
Data Source
AI summary
The present invention relates to an incremental analog to digital converter incorporating noise shaping and residual error quantization. In one embodiment, a circuit includes an incremental analog to digital converter, comprising a loop filter that filters an analog input signal in response to receiving a reset signal, resulting in a filtered analog input signal, and a successive approximation register (SAR) quantizer, coupled with the filtered analog input signal, that converts the filtered analog input signal to an intermediate digitized output of a first resolution based on a reference voltage, wherein the SAR quantizer comprises a feedback loop that shapes quantization noise generated by the SAR quantizer as a result of converting the filtered analog input signal; and a digital filter, coupled with the intermediate digitized output, that generates a digitized output signal of a second resolution, greater than the first resolution, by digitally filtering the intermediate digitized output.


