Incremental Voltage Programming for Stacked Magnetic Tunnel Junctions
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current magnetic random access memory (MRAM) technologies face challenges in reducing cell size and enabling writing to stacked magnetic tunnel junctions (MTJs), limiting memory capacity and scalability.
Innovation Solution
A method and apparatus for programming magnetic tunnel junctions (MTJs) in a magnetic memory system, involving storing data in a cache register, reading the logic state of MTJs, swapping data, and applying specific voltage levels to overwrite and write data to multiple MTJs, allowing for smaller cell sizes and increased memory capacity by stacking MTJs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If conventional MRAM cell structures are used, then current writing methods can program MTJs, but cell size cannot be reduced and stacked MTJs cannot be written
Solution Approach 1:
The patent segments the writing process into multiple voltage levels applied sequentially to different MTJs in a stack. By dividing the memory array into stacks of MTJs and applying targeted voltage levels to specific segments, the system can write to individual MTJs or groups of MTJs independently, enabling reduced cell size while maintaining writing capability.
Solution Approach 2:
The patent transitions from planar MTJ structures to vertically stacked MTJ configurations. By stacking multiple MTJs in the vertical dimension rather than expanding horizontally, the cell footprint is reduced while the writing method addresses the vertical stack through selective voltage application to different levels of the stack.
2Quantity of substance
If voltage is applied to write to stacked MTJs, then memory capacity increases, but power consumption and complexity increase
Solution Approach 1:
The patent applies different voltage levels locally to different MTJs within a stack based on their specific requirements. Each MTJ or group of MTJs receives a tailored voltage level appropriate for its state and position in the stack, rather than applying a uniform high voltage to all MTJs, thereby reducing overall power consumption while achieving the desired memory capacity.
Solution Approach 2:
The patent utilizes multiple voltage levels as a parameter to selectively write to different MTJs in a stack. By changing the voltage level parameter and applying it selectively to different MTJs, the system can program multiple bits of data in a single memory cell (using stacked MTJs) while controlling power consumption through precise voltage management rather than always applying maximum voltage.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables efficient writing to multiple MTJs, reducing cell size and increasing memory capacity while maintaining low power consumption and scalability, making it suitable for replacing conventional memory solutions.
Implementation Method 1
An exemplary MTJ uses spin torque transfer to effectuate a change in the direction of magnetization of one or more free layers in the MTJ
Implementation Method 2
writing bits of information is achieved by using a spin polarized current flowing through the MTJ, instead of using a magnetic field, to change states or program/write/erase/read bits
Implementation Method 3
applying a first predetermined voltage level to the set of MTJs thereby causing the first MTJ to be over-written, applying a second predetermined voltage level to the set of MTJs, and storing the in-coming data into the second MTJ
Data Source
AI summary
A method of writing to magnetic tunnel junctions (MTJs) of a magnetic memory array includes storing in-coming data in a cache register, reading the present logic state of a first one of a set of at least two MTJs, the set of at least two MTJs including the first MTJ and a second MTJ. The in-coming data is to be written into the second MTJ. Further steps are storing the read logic state into a data register, swapping the contents of the data register and the cache register so that the cache register stores the read logic state and the data register stores the in-coming data, applying a first predetermined voltage level to the set of MTJs thereby causing the first MTJ to be over-written, applying a second predetermined voltage level to the set of MTJs, and storing the in-coming data into the second MTJ.