Indented CMOS Photodiode Structure for Higher Full Well Capacity
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Solution Overview
Problem
CMOS image sensors face limitations in full well capacity due to the difficulty in controlling photodiode profiles with high ion-implant dosage, which affects picture quality and dynamic range, especially as device scaling reduces pixel dimensions and increases thermal budget constraints.
Innovation Solution
The introduction of a CMOS image sensor with a photodiode structure featuring an indented p-n junction interface, including recessed portions symmetrically distributed along the gate electrode and floating diffusion region, increases the area of the p-n junction interface, enhancing full well capacity by increasing electron-hole pairs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If high ion-implant dosage is used to increase full well capacity, then the full well capacity increases, but the photodiode profile control becomes difficult
Solution Approach 1:
The patent introduces a third dimension by creating recessed portions in the photodiode structure, transforming the flat two-dimensional photodiode interface into a three-dimensional indented structure. This increases the effective junction area without requiring higher ion-implant dosage, thus improving full well capacity while maintaining profile control precision.
Solution Approach 2:
The patent changes the geometric parameters of the photodiode structure by introducing recessed portions with specific dimensions (depth and width). This structural parameter change increases the effective area for charge collection, thereby increasing full well capacity without compromising the controllability of the photodiode profile during fabrication.
2Area of moving object
If device scaling is performed to reduce pixel dimensions, then the integration density increases, but the full well capacity decreases
Solution Approach 1:
By introducing vertical recesses into the photodiode structure, the patent effectively adds a third dimension to the charge collection volume. This allows the full well capacity to be increased without increasing the planar pixel footprint, enabling higher integration density while maintaining or improving full well capacity.
Solution Approach 2:
The recessed portions are nested within the photodiode structure, creating additional charge collection volume inside the existing pixel boundary. This nested structure allows the photodiode to accommodate more charge carriers without increasing the overall pixel area, thus resolving the contradiction between scaling and full well capacity.
3Manufacturing precision
If ion-implantation process is used to form photodiode, then the doping profile can be controlled, but thermal budget constraints are increased
Solution Approach 1:
The recessed portions are formed in the photodiode structure before final doping or at an early stage of fabrication. This preliminary structural preparation allows subsequent doping processes to be performed with lower thermal budgets, as the geometric configuration is already optimized to provide the desired full well capacity without requiring high-temperature annealing.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design improves the full well capacity of the CMOS image sensor, leading to better performance and picture quality by effectively managing thermal budgets and ion-implantation challenges.
Implementation Method 1
The photo detecting column and the substrate are in contact with each other at a junction interface and are configured as a photodiode structure to convert radiation that enters the substrate into an electrical signal
Data Source
AI summary
The present disclosure relates to a CMOS image sensor, and an associated method of formation. In some embodiments, the CMOS image sensor comprises a substrate and a transfer gate disposed from a front-side surface of the substrate. The CMOS image sensor further comprises a photo detecting column disposed at one side of the transfer gate within the substrate. The photo detecting column comprises a doped sensing layer comprising one or more recessed portions along a circumference of the doped sensing layer in parallel to the front-side surface of the substrate. By forming the photo detecting column with recessed portions, a junction interface is enlarged compared to a previous p-n junction interface without recessed portions, and thus a full well capacity of the photodiode structure is improved.