Independent CSR Clocking for Low-Power IP Block Access
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Solution Overview
Problem
Existing integrated circuit (IC) designs face issues with higher power dissipation, additional latency, and design complexity due to common clocking of configuration and status registers (CSRs) with IP blocks, leading to constraints on physical placement and inability to update CSRs without powering up IP blocks.
Innovation Solution
Implement independent clocking for CSRs using a derived clock rate that is an integer division slower than the IP block's clock rate, allowing the application processor to access CSRs independently, with a clock manager generating separate clock signals for IP blocks and CSRs, and using asynchronous bridges for communication across different clock domains.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If common clock lines are routed to both IP block and CSRs, then CSRs operate at the same clock speed as IP blocks, but power dissipation increases and latency increases
Solution Approach 1:
The patent divides the clocking system into two independent parts: a first clock signal for the IP block and a second clock signal for the CSRs. The second clock signal is generated by dividing the first clock signal by an integer N, creating a slower clock for CSRs. This segmentation allows CSRs to operate independently from the IP block clocking, reducing power dissipation while maintaining functionality.
2Speed
If common clock lines are routed to both IP block and CSRs, then CSRs operate at the same clock speed as IP blocks, but additional latency is introduced in accessing CSRs
Solution Approach 1:
By segmenting the clocking system into separate first and second clock signals, the patent eliminates the need for complex clock domain crossing synchronizers that would be required if CSRs and IP blocks shared a common clock. This reduces the latency introduced by CDC synchronizers while maintaining synchronous operation within each domain.
3Adaptability or versatility
If custom CDC synchronizers are used to clock CSRs separately, then CSRs can operate independently, but design effort increases and design area increases
Solution Approach 1:
Instead of using complex custom CDC synchronizers, the patent changes the clocking parameters by using a simple integer division approach. The second clock signal is generated by dividing the first clock signal by an integer N, which is a straightforward parameter transformation that avoids the complexity of custom synchronizer designs while achieving independent CSR clocking.
4Adaptability or versatility
If custom CDC synchronizers are used to clock CSRs separately, then CSRs can operate independently, but power consumption increases
Solution Approach 1:
The patent uses parameter changes by generating the second clock signal through integer division of the first clock signal. This approach is more efficient than custom CDC synchronizers because it avoids the additional logic and power consumption associated with synchronizer circuits, while still achieving independent CSR operation at a lower frequency.
Data Source
AI summary
This document describes systems and techniques that enable independent clocking for configuration and status registers (CSRs). The described systems and techniques can provide a clock signal to a CSR set of an IP block with a derived clock rate an integer division slower than a clock rate of another clock signal that enables operation of the IP block, which may include communication between the IP block and an application processor. The derived clock rate is synchronous to but independent of the clock rate of the clock signal. In this way, the application processor and other entities can access the CSR set independent of clocking of the IP block. For example, the application processor can read from or write to the CSR set without waking the IP block from an Auto Clock Gated mode. By so doing, described aspects of independent clocking can reduce power dissipation associated with the CSR set.