Independent Dynamic Reference Areas for Memory Access

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Solution Overview

Problem

Conventional memory architectures face data misclassification errors due to the spatial distribution of memory cells along a word line, which limits access time and efficiency in sensing logic states.

Innovation Solution

The implementation of separate dynamic reference (Dref) areas that can be independently accessed, using a switch component to couple Dref areas to sense amplifiers based on the physical proximity of memory cells, allowing for accurate threshold voltage comparisons and reduced access times.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If memory cells are closely spaced and arrayed in a core cell array, then storage density is improved, but access time increases due to longer signal paths

Engineering Contradiction:
Improvestorage densityVSAvoidaccess time
Core Design Contradiction:
Quantity of substanceVSLoss of time

Solution Approach 1:

The patent divides the memory array into multiple independently accessible banks, where each bank can be accessed simultaneously. This segmentation allows parallel access to different portions of memory, reducing the overall access time while maintaining high storage density through the closely spaced core cell array structure

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a bank dimension to the memory architecture, organizing memory cells in a three-dimensional structure (bank × row × column) rather than a flat two-dimensional array. This additional dimension enables simultaneous access to multiple banks, effectively reducing access time while preserving storage density

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Device complexity

If a single Dref area is used for threshold voltage comparisons, then device complexity is reduced, but data misclassification errors increase due to spatial distribution of memory cells

Engineering Contradiction:
Improvereference area structureVSAvoiddata accuracy
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent implements multiple Dref areas distributed across different banks, where each Dref area serves its local bank. This local arrangement ensures that threshold voltage comparisons are performed using reference cells that are spatially close to the data cells being sensed, eliminating misclassification errors caused by spatial distribution while keeping each local Dref area simple in structure

Inventive Principle:
Principle #3Local quality

3Loss of time

If Dref areas are coupled to sense amplifiers through a switch component, then access time is reduced through independent access, but device complexity increases

Engineering Contradiction:
Improveaccess timeVSAvoidswitching control structure
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The patent pre-organizes the memory architecture with dedicated switch components and control logic for each bank, allowing Dref areas to be independently coupled to sense amplifiers before access is needed. This preliminary structuring enables rapid switching and independent bank access without requiring complex dynamic reconfiguration during operation

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS7961519B2Memory employing independent dynamic reference areas
Publication Date: 2011.06.14 INFINEON TECHNOLOGIES LLC
  • US7961519B2 patent drawing
  • US7961519B2 patent drawing
  • US7961519B2 patent drawing

AI summary

A memory that employs separate Dref areas that are independently accessed to provide a threshold voltage reference signal. The memory includes the separate Dref areas, a data area positioned between the Dref areas, one or more sense amplifiers, and a switch component. The switch component is arranged to receive addressing data and to independently couple one of the separate Dref areas to the sense amplifiers based, at least in part, on a physical proximity of individual memory cells along a word line.