Independent Memory Maps for Shared Memory Access
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Solution Overview
Problem
Existing computerized systems face challenges in efficiently accessing shared memory by multiple processing units due to differing constraints and requirements, which can lead to performance limitations and inflexibility in address mapping.
Innovation Solution
The method involves defining two different logical-physical address mappings with distinct unit sizes for each processing unit, allowing them to access shared memory independently while exchanging data, thereby decoupling their limitations and optimizing performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a single uniform mapping unit size is used for all processing units accessing shared memory, then the system structure is simple and easy to manage, but processing units with different constraints cannot access memory efficiently, leading to performance limitations
Solution Approach 1:
The patent applies local quality by allowing each processing unit to have its own mapping unit size tailored to its specific constraints and requirements. Different regions of the memory system can have different mapping characteristics, enabling each processing unit to access memory in the most efficient way for its architecture while maintaining overall system functionality.
Solution Approach 2:
The patent segments the address mapping function by introducing separate mapping units (MMUs) for different processing units. Each MMU independently manages its own mapping table and translation process, allowing parallel operation with different mapping parameters. This segmentation enables simultaneous access with different granularities without requiring a single unified mapping scheme.
2Ease of operation
If the mapping is configured to meet the constraints of one processing unit, then that unit can access memory efficiently, but other processing units with different constraints may experience performance degradation
Solution Approach 1:
The patent implements universality by designing a memory mapping system that can simultaneously support multiple different mapping configurations. The shared memory system universally accepts access requests from different processing units with different mapping unit sizes, translating each according to its own constraints while maintaining efficient access for all units.
3Productivity
If dynamic memory reorganization is performed to optimize access patterns, then memory access efficiency improves, but system complexity increases and may cause access delays during reorganization
Solution Approach 1:
The patent applies preliminary action by pre-configuring mapping tables in each MMU before memory access operations begin. The mapping relationships are established in advance based on the specific constraints of each processing unit, allowing immediate efficient access without requiring dynamic reorganization during operation. This eliminates reorganization delays while maintaining optimized access patterns.
Data Source
AI summary
A method includes defining a first mapping, which translates between logical addresses and physical storage locations in a memory with a first mapping unit size, for accessing the memory by a first processing unit. A second mapping is defined, which translates between the logical addresses and the physical storage locations with a second mapping unit size that is different from the first mapping unit size, for accessing the memory by a second processing unit. Data is exchanged between the first and second processing units via the memory, while accessing the memory by the first processing unit using the first mapping and by the second processing unit using the second mapping.