Independent Memory Permission Table for Virtualization Security

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Solution Overview

Problem

Existing virtualization technologies, such as Xen, lack a practical method for implementing page-level memory security without interfering with the existing memory model, leaving virtualized computer programs vulnerable to attacks like code injection and modification.

Innovation Solution

A data processing method is introduced that creates and stores a second table of memory page access permissions independent of the existing page type permissions, allowing for more restrictive memory access control by registering security logic as a memory event interface with the Xen hypervisor, which determines and enforces different permissions for memory pages based on page faults, ensuring only authorized actions are allowed.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If Xen hypervisor uses existing memory page type permissions (p2m framework) to manage memory, then memory management functionality is maintained, but security control over memory access permissions is insufficient

Engineering Contradiction:
Improvememory securityVSAvoidmemory permission framework
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent segments memory permission control into two independent layers: the original Xen p2m framework for basic memory management, and a new security layer (independent permission table) for enhanced security control. This allows each layer to perform its specific function without interfering with the other, resolving the contradiction between maintaining existing functionality and adding security.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces an intermediary security logic component that sits between the CPU and the memory system. This intermediary intercepts memory access requests, checks them against the independent permission table, and only allows access if both the original p2m permissions and the new security permissions are satisfied. This mediator enables enhanced security without breaking existing memory management.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If SecVisor uses OS page table permission bits to control memory, then page-level security is achieved, but interworking with hypervisor memory permissions is impossible

Engineering Contradiction:
Improvepage permission controlVSAvoidhypervisor integration
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

Instead of trying to modify OS page tables (one dimension), the patent adds another dimension of control by introducing an independent permission table at the hypervisor level. This new dimension works in parallel with the OS page tables, allowing both OS-level and hypervisor-level permission control without conflict or loss of integration capability.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Productivity

If memory pages are marked as swapped out in Xen p2m, then memory is freed for other uses, but security restrictions on page access cannot be applied

Engineering Contradiction:
Improvememory utilizationVSAvoidsecurity permission enforcement
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent applies preliminary security marking to memory pages before they are swapped out. The independent permission table stores security attributes (such as whether a page contains code, data, or is executable) in advance. When pages are swapped out and later brought back in, the security logic can quickly restore the appropriate permissions based on these pre-stored attributes, maintaining both memory utilization and security enforcement.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentEP2764434B1Security in virtualized computer programs
Publication Date: 2019.09.11 CISCO TECHNOLOGY INC
  • EP2764434B1 patent drawingFigure 1A~1B
  • EP2764434B1 patent drawingFigure 1C~1D
  • EP2764434B1 patent drawingFigure 2

AI summary

In an embodiment, a method comprises implementing a memory event interface to a hypercall interface of a hypervisor or virtual machine operating system to intercept page faults for writing pages of memory that contain a computer program; receiving a page fault resulting from a guest domain attempting to write a page that is marked as not executable in a memory page permissions system; determining a first set of memory page permissions for the page that are maintained by the hypervisor or virtual machine operating system; determining a second set of memory page permissions that are maintained independent of the hypervisor or virtual machine operating system; determining a particular memory page permission for the page based on the first set and the second set; processing the page fault based on the particular memory page permission, including performing at least one security function associated with regulating access to the page.