Independent Processor Voltage Supply for Multi-Core Chips
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Solution Overview
Problem
Multi-core processor chips face challenges in meeting performance specifications due to within-chip process variations, where individual cores may fail to meet clock rate requirements, leading to decreased manufacturing yields and higher costs compared to multi-chip solutions.
Innovation Solution
A method is implemented where each processing core on a multi-core processor system is supplied with a nominal power supply voltage and an adjustable second power supply voltage, which is selectively raised or lowered to ensure each core operates within a reference clock rate specification, using a controller to adjust power supply voltages and inter-core voltage-level translation communication blocks to enable divergent signal supply voltages.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a common power supply voltage is used for all processing cores, then the power supply system is simple and cost-effective, but individual cores may fail to meet performance specifications due to within-chip process variations
Solution Approach 1:
The power supply system is segmented into multiple independent voltage regulation modules, each serving specific processing cores. This allows individual cores to receive customized voltage levels tailored to their performance characteristics, resolving the contradiction between reliability and complexity by dividing the monolithic power supply into functional segments.
Solution Approach 2:
Different voltage levels are applied to different processing cores based on their individual performance requirements. Cores that meet specifications receive nominal voltage, while marginal cores receive adjusted voltage levels to ensure compliance, thereby achieving local optimization of performance without uniformly increasing system complexity.
2Reliability
If the nominal power supply voltage is increased to ensure all cores meet specifications, then performance reliability improves, but overall power consumption increases
Solution Approach 1:
The voltage parameter is dynamically adjusted for individual cores based on their performance characteristics. By changing the voltage parameter selectively rather than uniformly, the system ensures specification compliance for all cores while minimizing overall power consumption, as power consumption scales with the square of voltage.
Solution Approach 2:
Instead of applying excessive voltage to all cores, the system applies voltage adjustments only to the extent necessary for each individual core to meet specifications. This partial action approach avoids the quadratic power penalty of uniformly increasing voltage across the entire processor.
3Productivity
If individual core voltage adjustment is implemented, then manufacturing yield improves by salvaging marginal cores, but device complexity and cost increase
Solution Approach 1:
The power supply architecture is segmented into multiple voltage domains with independent regulation, enabling individual core voltage control. This segmentation allows marginal cores to be salvaged through targeted voltage adjustment, improving manufacturing yield while containing complexity through modular design.
Solution Approach 2:
The voltage regulation system is designed to serve multiple functions: it provides nominal voltage to most cores while simultaneously enabling adjusted voltage levels for marginal cores. This multi-functionality improves yield without requiring entirely separate voltage supply systems, thereby limiting the increase in device complexity.
Data Source
AI summary
Systems, methods and program codes are provided for selectively adjusting multi-core processor chip structure individual processor core power supply voltages through controlling individual power supplies for each core, in one aspect to ensure that one or more cores operate at clock rates in compliance with one or more performance specifications. Nominal power supply voltage is supplied to a first processing core, and a second core power supply voltage greater or lower than the nominal power supply voltage is supplied to a second processing core, both cores operating in compliance with a reference clock rate specification. The second power supply voltage may be selected from ordered discrete supply voltages derived by progressively lowering the nominal supply voltage, optionally wherein the selected supply voltage also enables the second core to operate within another performance specification.