Indirect Data Addressing for I/O Control Blocks

The patent introduces an intermediary addressing mechanism where the channel does not directly address the command data area but rather uses a control block that contains the address information. This intermediary structure allows the system to maintain simple addressing from the channel's perspective while enabling flexible, non-contiguous storage of command data through the use of multiple address fields and scattered storage capabilities in the control block.

The patent segments the command data storage into multiple non-contiguous locations in memory. Instead of requiring a single contiguous block, the control block can reference multiple scattered storage areas, allowing commands to be distributed across available memory space. This segmentation enables more efficient memory utilization and improved performance while maintaining storage flexibility.

The patent implements dynamic command data area sizing through the control block structure. The control block contains multiple address fields and length indicators that allow the command data area to expand or contract based on the number and size of commands being grouped. This dynamic approach enables flexible command grouping while maintaining simple addressing through the control block's structured format.

The patent merges multiple individual command processing operations into a single batch processing operation. By allowing multiple commands to be grouped and referenced through a single control block, the system reduces the number of separate parse, track, and react cycles required. This merging maintains processing accuracy through the structured control block format while significantly reducing the processing overhead associated with per-command handling.