Indium Bump Uniformity via Etch Back Process
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Solution Overview
Problem
Conventional methods for forming interconnects between semiconductor devices, such as indium bump interconnects, often result in non-uniformity issues that negatively impact detector yield, especially as the pitch of detectors becomes smaller.
Innovation Solution
The method involves an etch back process to form uniform metal bumps, such as indium or multi-metal stacks, on semiconductor substrates, which are then used to couple semiconductor devices like infrared detectors to readout integrated circuits, enhancing contact uniformity and yield.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional indium bump interconnect methods are used, then electrical interconnects can be formed between semiconductor devices, but bump non-uniformity increases as pitch decreases, negatively affecting detector yield
Solution Approach 1:
The patent applies preliminary action by forming a uniform metal layer and patterned openings in a photoresist layer before depositing the indium bump material. This pre-structured template ensures that subsequent bump formation occurs with precise spatial control, preventing the non-uniformity that typically develops during direct bump deposition processes.
Solution Approach 2:
The patent introduces an intermediary photoresist layer with patterned openings that acts as a mold or template during bump formation. This intermediary structure mediates between the desired bump pattern and the deposition process, ensuring uniform bump dimensions even at small pitches by controlling material flow and deposition geometry.
2Quantity of substance
If smaller contact pitches are used to increase device density, then more interconnects can be packed, but bump non-uniformities increasingly negatively affect detector yield
Solution Approach 1:
The patent applies local quality by creating spatially varying structures in the photoresist layer, with patterned openings that define precise local regions for bump formation. This local structuring allows each bump to be formed with controlled dimensions and spacing, maintaining uniformity even when the overall pitch is reduced to increase interconnect density.
Solution Approach 2:
The patent performs preliminary patterning of the photoresist layer to create a template of patterned openings before bump deposition. This preliminary action establishes the precise spatial arrangement and dimensions for all bumps, enabling high-density interconnects to be formed with uniformity by controlling the mold structure rather than relying on direct bump deposition control.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach significantly improves the uniformity of bump contacts, leading to increased device yield and reliability, particularly for devices with small contact pitches.
Implementation Method 1
forming interconnects on a semiconductor device includes providing a semiconductor substrate such as a semiconductor substrate wafer having alignment marks, forming a first layer of photoresist on the substrate, patterning the first layer of photoresist to remove a first portion of the first layer of photoresist and to leave a second portion of the first layer of photoresist covering the alignment marks, forming a metal layer on the substrate and over the remaining second portion of the first layer of photoresist, lifting off a portion of the metal layer by removing the remaining second portion of the first layer of photoresist, forming a second layer of photoresist on the metal layer, patterning the second layer of photoresist using the alignment marks, and selectively etching the metal layer using the patterned second layer of photoresist to form bumps on the substrate
Data Source
AI summary
Systems and methods may be provided for coupling together semiconductor devices. One or more of the semiconductor devices may be provided with an array of bump contacts formed in an etch back process. The bump contacts may be indium bumps. The indium bumps may be formed by depositing a sheet of indium onto a surface of a device substrate, depositing and patterning a layer of photoresist over the indium layer, and selectively etching the indium layer to the surface of the substrate using the patterned photoresist layer to form the indium bumps. The substrate may be an infrared detector substrate. The infrared detector substrate may be coupled to a readout integrated circuit substrate using the bumps.