Indium Phosphide Substrate Processing for Low Back-Surface Warpage

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Solution Overview

Problem

The warpage of the back surface of indium phosphide substrates during epitaxial growth leads to non-uniform heat conduction and substrate temperature, resulting in poor quality epitaxial crystal layers and semiconductor epitaxial wafers with performance issues such as shifted emission wavelengths.

Innovation Solution

The indium phosphide substrate is produced with a controlled back surface warpage of 3.5 μm or less, achieved through specific cutting and etching processes using a wire saw with controlled wire delivery and etching with a phosphoric acid and hydrogen peroxide solution, ensuring uniform contact with the susceptor during epitaxial growth.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If mechanical polishing is performed on the indium phosphide substrate, then the surface flatness is improved, but polishing debris and damage are introduced requiring additional etching steps

Engineering Contradiction:
Improvesurface flatnessVSAvoidproduction process complexity
Core Design Contradiction:
Manufacturing precisionVSEase of manufacture

Solution Approach 1:

The patent performs preliminary mechanical polishing to achieve desired surface flatness before epitaxial growth, then applies a controlled etching step to remove only the damaged layer and debris. This preliminary action approach allows the substrate to meet flatness requirements while eliminating the harmful effects of mechanical processing through the subsequent etching step.

Inventive Principle:
Principle #10Preliminary action

2Manufacturing precision

If the back surface warpage is reduced to improve heat conduction uniformity, then epitaxial crystal layer quality is improved, but additional processing steps and time are required

Engineering Contradiction:
Improveback surface flatnessVSAvoidproduction time
Core Design Contradiction:
Manufacturing precisionVSLoss of time

Solution Approach 1:

The patent applies mechanical polishing and etching steps before epitaxial growth to preliminarily correct back surface warpage and achieve the required flatness (WARP value of 3.5 μm or less). By performing these corrections in advance, the substrate is prepared for uniform heat conduction during epitaxial growth without requiring additional time-consuming steps during the growth process itself.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent controls the back surface flatness by adjusting processing parameters such as polishing pressure, etching time, and etchant concentration to achieve the optimal WARP value range. This parameter optimization balances the need for sufficient flatness correction with minimizing excessive processing time.

Inventive Principle:
Principle #35Parameter changes

3Manufacturing precision

If multiple etching steps are performed to remove polishing damage, then substrate quality is improved, but production complexity and time increase

Engineering Contradiction:
Improvesubstrate qualityVSAvoidprocess steps
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent applies etching slightly in excess of the minimum required to remove all polishing damage, ensuring complete elimination of damaged layers and debris. This partial excessive action guarantees substrate quality by over-etching slightly beyond the visible damage layer, then controls the overall process complexity by limiting the number of etching steps to two controlled stages rather than multiple sequential steps.

Inventive Principle:
Principle #16Partial or excessive action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach results in a substrate with suppressed warpage, achieving uniform heat conduction and improved epitaxial crystal layer quality, thereby enhancing the performance of semiconductor epitaxial wafers by maintaining consistent substrate temperature during growth.

Implementation Method 1

cutting a wafer from an indium phosphide ingot with a wire saw

Methodology Applied
Scientific EffectAbrasion: Abrasion

Implementation Method 2

etching the cut wafer; etching the polished wafer

Methodology Applied
Scientific EffectChemical etching: Chemical Bonding

Data Source

PatentUS11901170B2Indium phosphide substrate, semiconductor epitaxial wafer, and method for producing indium phosphide substrate
Publication Date: 2024.02.13 JX NIPPON MINING & METALS CORP

AI summary

Provided is an indium phosphide substrate, a semiconductor epitaxial wafer, and a method for producing an indium phosphide substrate, which can satisfactorily suppress warpage of the back surface of the substrate. The indium phosphide substrate includes a main surface for forming an epitaxial crystal layer and a back surface opposite to the main surface, wherein the back surface has a WARP value of 3.5 μm or less, as measured with the back surface of the indium phosphide substrate facing upward.