Inductive Bias Ladders in RF Switch Stacks for GIDL Control

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Solution Overview

Problem

Field-effect transistor (FET) switch stacks experience undesired gate-induced drain/body leakage current (GIDL) during RF swings, leading to unbalanced DC voltage distribution and potential early breakdown of transistors, particularly those closer to the top of the stack.

Innovation Solution

Incorporating inductive drain and/or body ladders in the switch stack, where inductors are coupled across drain and source terminals or body terminals of FETs to reduce the de-biasing effect by acting as short circuits for DC components and open circuits for AC components of the GIDL current.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If resistive bias ladders are used to distribute DC voltages across FET switch stacks, then DC voltage distribution is provided, but gate-induced drain/body leakage current causes de-biasing effect and unbalanced voltage distribution

Engineering Contradiction:
ImproveDC voltage distribution balanceVSAvoidGIDL current de-biasing effect
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The patent changes the bias ladder configuration from purely resistive to inductive by introducing inductors in series with the resistors. This parameter change in the circuit topology allows the bias ladder to block DC leakage currents while maintaining proper DC voltage distribution across the FET stack, thereby resolving the de-biasing effect caused by GIDL current.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The inductor acts as an intermediary element between the resistive bias ladder and the FET drain terminals. It blocks the DC component of GIDL current from flowing through the bias ladder while allowing AC RF signals to pass, thus preventing the de-biasing effect without disrupting the DC voltage distribution function.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Power

If stacked FET configuration is used to handle large RF power, then RF power handling capability is improved, but GIDL current increases and causes early breakdown of transistors

Engineering Contradiction:
ImproveRF power handling capabilityVSAvoidtransistor breakdown resistance
Core Design Contradiction:
PowerVSReliability

Solution Approach 1:

The patent modifies the bias network parameters by introducing inductive elements, which changes the impedance characteristics at DC and RF frequencies. This allows the stacked FET configuration to maintain its high RF power handling capability while the inductive bias ladder prevents excessive DC leakage current from causing transistor breakdown.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent converts the harmful GIDL current effect into a beneficial outcome by using the inductive bias ladder to block DC leakage while allowing AC signals to pass. The same stacked configuration that generates GIDL current also benefits from the inductive biasing that prevents its harmful effects, thus turning the potential harm into a manageable condition.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The use of inductive bias ladders significantly reduces the de-biasing effect, leading to more uniform DC voltage distribution across the switch stack, thereby extending the lifespan of transistors and improving the overall performance of RF switches.

Implementation Method 1

a drain bias ladder comprising one or more drain inductors coupled across drain and source terminals of corresponding one or more first FETs

Methodology Applied
Scientific EffectInductive impedance: Inductor

Implementation Method 2

a body bias ladder comprising one or more body inductors, wherein each of the one or more body inductors is coupled across body terminals of a corresponding pair of first adjacent FETs

Methodology Applied
Scientific EffectInductive impedance: Inductor

Data Source

PatentUS11923838B2Inductive drain and/or body ladders in RF switch stacks
Publication Date: 2024.03.05 PSEMI CORP
  • US11923838B2 patent drawing
  • US11923838B2 patent drawing
  • US11923838B2 patent drawing

AI summary

Methods and devices to reduce the gate-induced drain/body leakage current (GIDL) generated in FET switch stacks when in OFF state are disclosed. Such devices include inductors as part of bias networks coupled with drain/source terminals and/or body terminals of the transistors within the switch stack. Hybrid approaches where resistors in combination with inductors are implemented as part the bias network are also described.