Inductive Load Current Control With Learned ADC Fetch Timing
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Solution Overview
Problem
Existing electronic control apparatuses for inductive loads face challenges in achieving accurate current control while maintaining a low processing load on the controller, particularly due to increased processing demands when increasing the sampling number of current detection values.
Innovation Solution
The electronic control apparatus includes a current detector, analog-digital converter, and controller that learns optimal fetch timing for the A/D converter to minimize deflection between ideal and sample data values, allowing for reduced sampling frequencies while maintaining accuracy through adaptive timing adjustments.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the sampling number of the detection current value is increased to improve measurement precision, then the accuracy of current control is improved, but the processing load on the control CPU increases
Solution Approach 1:
The patent applies preliminary action by pre-calculating and storing correction values in a lookup table during system initialization or calibration phase. The correction values compensate for timing-related measurement errors without requiring real-time complex calculations. During operation, the controller simply retrieves the appropriate correction value from the table based on the actual fetch timing, thereby maintaining high measurement accuracy while minimizing processing load during current control operations.
Solution Approach 2:
The patent replaces complex real-time arithmetic processing with a table-based retrieval system. Instead of performing heavy computational operations during runtime to correct timing errors, the system substitutes mechanical/computational complexity with a pre-computed lookup table approach. This substitution maintains measurement precision while dramatically reducing the processing burden on the control CPU during operational phases.
2Device complexity
If the sampling frequency is reduced to decrease processing load, then the processing load on the controller is reduced, but the accuracy of current detection may deteriorate
Solution Approach 1:
The patent applies parameter changes by dynamically adjusting the fetch timing of the A/D converter based on pre-calculated optimal timing values stored in the lookup table. By changing the timing parameter rather than the sampling frequency, the system maintains accurate current detection at lower sampling rates. The correction values in the table compensate for timing variations, allowing accurate measurements even when sampling frequency is reduced to decrease processing load.
3Measurement precision
If the number of arithmetic operations on detection current value is increased to improve control accuracy, then the precision of current control is improved, but the processing time increases
Solution Approach 1:
The patent performs arithmetic operations in advance by pre-calculating correction values during system initialization or calibration. These pre-computed values are stored in a lookup table for rapid retrieval during operational phases. This preliminary action eliminates the need for time-consuming arithmetic operations during real-time current control, thereby maintaining high precision while minimizing processing time during critical operational periods.
Data Source
AI summary
An electronic control apparatus that controls actuation of an inductive load includes: a current detector that detect current flowing through the inductive load and outputs a current detection signal in an analog signal; an analog-digital converter that takes in the current detection signal at a fetch timing, and converts the current detection signal into a current detection value; and a controller that calculates a current arithmetic value by executing arithmetic processing for the current detection value, and controls the current based on the current arithmetic value. The controller obtains a sample data value of the current arithmetic value for each of a plurality of fetch timings. The controller calculates a deflection between an ideal value of the current arithmetic value and the sample data value of the current arithmetic value, and learns the fetch timing, causing the deflection with the ideal value of the current arithmetic value to be minimized.