Inductor Dummy Metal Layout for RFIC Yield Without Performance Loss
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Solution Overview
Problem
In integrated circuits, particularly RFICs, the insufficient metal arrangement area in the bottom metal layer of metal wires leads to poor yield and a risk of short-circuiting, especially when dummy metals are used under inductor devices, which can impair the inductor's performance.
Innovation Solution
The inductor device wiring architecture includes a plurality of dummy metals arranged in multiple metal layers under the inductor device, with the arrangement areas of dummy metals progressively increasing in a direction away from the inductor device, minimizing their impact on the inductor's performance while ensuring sufficient metal arrangement for chemical mechanical polishing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If dummy metals are added to the bottom metal layer to increase the metal arrangement area, then the manufacturing yield is improved, but the performance of the inductor device deteriorates
Solution Approach 1:
The patent transitions from a single-layer dummy metal approach to a multi-layer configuration where dummy metals are distributed across different metal layers. This dimensional change allows the dummy metals to provide sufficient arrangement area for manufacturing while being positioned in layers that minimize their adverse impact on inductor performance, effectively resolving the contradiction between yield improvement and performance preservation.
Solution Approach 2:
The patent applies different arrangements of dummy metals in different metal layers. Specifically, the first dummy metal in the first metal layer and the second dummy metal in the second metal layer are positioned at different locations, creating local variations in dummy metal distribution. This local quality approach ensures that each layer contributes to the overall metal arrangement area while minimizing the negative impact on any single inductor device.
2Manufacturing precision
If dummy metals are placed close to the inductor device to ensure sufficient metal arrangement area, then the chemical mechanical polishing quality is improved, but the adverse effect on inductor performance increases
Solution Approach 1:
By distributing dummy metals across multiple metal layers rather than concentrating them in a single layer, the patent achieves sufficient total metal arrangement area for high-quality chemical mechanical polishing while positioning the dummy metals in different spatial dimensions. This multi-layer distribution reduces the harmful local concentration effect on inductor performance while maintaining overall polishing quality.
Solution Approach 2:
The patent segments the dummy metal structure into multiple discrete dummy metals positioned in different metal layers. The first dummy metal is placed in the first metal layer and the second dummy metal is placed in the second metal layer, creating a segmented configuration. This segmentation allows the system to achieve the cumulative metal area needed for polishing quality while reducing the localized adverse impact on any single inductor device.
Data Source
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AI summary
Embodiments of this application disclose an inductor device wiring architecture, including an inductor device and a plurality of dummy metals located under the inductor device. The plurality of dummy metals are arranged in a plurality of metal layers. Each of the plurality of metal layers corresponds to some of the plurality of dummy metals. Arrangement areas of dummy metals corresponding to at least two of the plurality of metal layers progressively increase in a direction away from the inductor device. In the inductor device wiring architecture, adverse effects on performance of the inductor device can be reduced, and a product yield can be increased. The embodiments of this application further disclose an integrated circuit and a communications device.