Inductive Element Quality Factor via Ground Shield and Tilling Structures
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional semiconductor devices face challenges in achieving high-quality inductive elements with a large quality factor, low resistance, and minimal capacitive coupling to the substrate, due to the introduction of dummy structures which increase resistive losses and deteriorate the quality factor of inductors, especially in RF circuits where large areas need to be kept free of dummy structures, affecting the CMP process window.
Innovation Solution
The use of tilling structures electrically connected in a geometrical pattern to inhibit the induction of image currents, arranged to minimize their presence near the inductive element, combined with a ground shield to reduce parasitic capacitance, allowing for high-quality inductive elements with optimized pattern density and integration of capacitive elements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If dummy structures are inserted to maintain planarity and improve CMP uniformity, then manufacturing process window is improved, but resistive losses of the inductor increase and quality factor deteriorates
Solution Approach 1:
A ground shield layer is introduced as an intermediary between the inductor and the substrate. This ground shield acts as a mediator that provides a reference potential plane for CMP uniformity and planarity maintenance, while preventing direct interaction between the inductor's magnetic field and the substrate, thereby avoiding eddy current losses in the inductor.
Solution Approach 2:
The device structure is segmented into distinct functional layers: the inductor layer, the ground shield layer, and the substrate. This segmentation allows the ground shield to independently fulfill the CMP uniformity requirement without interfering with the inductor's electrical performance, separating the manufacturing support function from the electrical function.
2Reliability
If a large area is kept free of dummy structures to maintain inductor quality factor, then inductor performance is improved, but pattern density requirements are not met and CMP uniformity deteriorates
Solution Approach 1:
The ground shield serves as a mediator that enables the presence of dummy structures in areas that would otherwise need to be kept free. By providing a reference plane and preventing direct magnetic coupling with the substrate, the ground shield allows dummy structures to be placed closer to the inductor without degrading its quality factor, thus satisfying pattern density requirements while maintaining CMP uniformity.
3Ease of manufacture
If tilling structures are arranged densely to meet minimum pattern density requirements, then CMP uniformity is improved, but image currents are induced in the tilling structures by the inductor's magnetic field
Solution Approach 1:
The ground shield acts as an intermediary barrier between the inductor's magnetic field and the tilling structures. By providing a reference potential plane, the ground shield prevents magnetic flux from penetrating to the tilling structures, thereby eliminating the induction of image currents while allowing the tilling structures to be densely arranged for CMP uniformity.
Solution Approach 2:
The ground shield is maintained at a reference potential (ground), creating an equipotential plane that prevents voltage differences between the inductor and tilling structures. This equipotential condition eliminates the driving force for image currents in the tilling structures, allowing them to be densely placed for manufacturing uniformity without generating harmful currents.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach results in inductive elements with improved quality factors and reduced resistive losses, while maintaining minimal pattern density requirements, and allows for the integration of high-quality capacitive elements without compromising the inductive element's performance.
Implementation Method 1
arranged in a geometrical pattern so as to substantially inhibit an inducement of an image current in the tilling structures by a current in the inductive element
Implementation Method 2
combined with a ground shield to reduce parasitic capacitance
Data Source
AI summary
The present invention provides a semiconductor device comprising a plurality of layers, the semiconductor device comprising:—a substrate having a first major surface,—an inductive element fabricated on the first major surface of the substrate, the inductive element comprising at least one conductive line, and—a plurality of tilling structures in at least one layer, wherein the plurality of tilling structures are electrically connected together and are arranged in a geometrical pattern so as to substantially inhibit an inducement of an image current in the tilling structures by a current in the inductive element. It is an advantage of the above semiconductor device that, by using such tilling structures, an inductive element with improved quality factor is obtained. The present invention also provides a method for providing an inductive element in a semiconductor device comprising a plurality of layers.