Inductor Pattern Layout to Prevent Passivation Cracks
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Solution Overview
Problem
Conventional semiconductor devices with inductor patterns experience passivation cracks due to high internal stress in the inductor area, primarily caused by small spacing at the endpoint during the alloy process.
Innovation Solution
The dimensions of the inductor pattern are modified to reduce corner stress, specifically by increasing the width of the second terminal and ensuring a certain distance relationship between the second terminal and the conductive lines, thereby releasing internal stress.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If the inductor pattern uses small spacing at endpoint during alloy process, then the device size is reduced, but passivation cracks occur due to high internal stress
Solution Approach 1:
The patent applies local quality by modifying only the endpoint region of the inductor pattern while keeping the rest of the structure unchanged. Specifically, the endpoint of the inductor pattern is extended beyond the alloy region boundary, creating a local structural difference that releases internal stress precisely where needed (at the endpoint) without affecting the overall compact design of the inductor.
Solution Approach 2:
The patent segments the inductor pattern into two distinct regions: the alloy region where metal layers are formed, and the extended endpoint region that protrudes beyond the alloy region boundary. This segmentation allows the endpoint to be independently designed to release stress while maintaining the integrity and compactness of the main inductor structure.
2Reliability
If the inductor pattern dimensions are modified to release internal stress, then passivation crack reliability is improved, but the inductor pattern complexity increases
Solution Approach 1:
The patent modifies only the local endpoint region rather than the entire inductor pattern. The endpoint extension is a simple geometric modification that adds minimal complexity while effectively releasing internal stress. The rest of the inductor pattern maintains its original simple spiral or rectangular geometry, thus avoiding significant increase in overall device complexity.
Data Source
AI summary
A semiconductor device includes a semiconductor substrate, an interconnection layer and an inductor pattern. The interconnection layer is disposed on the semiconductor substrate. The inductor pattern is electrically connected to the interconnection layer. The inductor pattern includes a first conductive line joined with a first terminal, a second conductive line joined with a second terminal, and a plurality of conductive coils. The conductive coils are joining the first conductive line to the second conductive line, and includes an outer coil joined with the first conductive line, an inner coil joined with the second conductive line and the outer coil. The second conductive line is spaced apart from a first side of the inner coil in a first direction by distance Y, the second terminal is spaced apart from a second side of the inner coil in a second direction by distance X1, wherein X1>1.25Y.