Multilayer Chip Inductor Parallel Via-Hole Connection
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Solution Overview
Problem
Conventional multilayer chip inductors often experience defective connections at through-hole conductors due to incomplete filling of conductors in ferrite sheets, leading to gaps and reduced performance.
Innovation Solution
The electronic component features a laminate structure with coil conductors arranged in parallel and via-hole conductors that connect the coil conductors in a specific pattern, avoiding series connections to prevent defective connections and enhancing the Q-factor by arranging sets of parallel portions along the coil length.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If through-hole conductors are used to connect coil conductors in series, then the coil structure can be formed, but defective connections occur due to incomplete filling of conductors in ferrite sheets
Solution Approach 1:
The patent divides the connection path into multiple via-hole conductors arranged in parallel rather than using a single series connection. This segmentation allows the current to flow through multiple parallel paths, reducing the impact of incomplete filling in any single via-hole conductor and improving overall connection reliability.
Solution Approach 2:
The patent changes the connection configuration from series to parallel arrangement of via-hole conductors. This parameter change transforms the electrical connection topology, allowing current to distribute across multiple paths and compensating for imperfections in individual conductor fillings.
2Device complexity
If multiple via-hole conductors are connected in series, then the coil structure is simplified, but gaps are created at boundaries reducing performance
Solution Approach 1:
The patent segments the via-hole conductors into multiple parallel units instead of using a single series connection. This segmentation creates multiple boundary interfaces that are distributed across parallel paths, preventing gap formation from compromising the entire connection and maintaining structural simplicity.
Solution Approach 2:
The patent merges multiple via-hole conductors into a parallel configuration, combining their conductive paths to achieve both structural simplicity and connection integrity. The merged parallel structure eliminates gaps at boundaries by providing alternative current paths.
3Loss of energy
If coil conductors are arranged in parallel with overlapping portions, then direct-current resistance is reduced, but the laminate structure becomes more complex
Solution Approach 1:
The patent utilizes the lamination dimension (z-axis) to arrange coil conductors in parallel across multiple layers. By extending the conductor arrangement into the vertical dimension through via-hole connections, the patent achieves parallel conduction paths without increasing planar complexity, thereby reducing DC resistance while maintaining a compact laminate structure.
Data Source
AI summary
A laminate formed by laminating a plurality of insulator layers. First coil conductors are provided in the laminate winding in a predetermined direction when viewed in a plan view in a direction of lamination. Second coil conductors are provided in the laminate on one side in the direction of lamination relative to the first coil conductors, winding in the predetermined direction when viewed in a plan view in the direction of lamination. First via-hole conductors connect downstream ends of the first parallel portion in the predetermined direction. Second via-hole conductors connect downstream ends of the second parallel portions in the predetermined direction. A third via-hole conductor connects the farthest of the first coil conductors on one side to the farthest of the second coil conductors on the other side in the direction of lamination. The first through third via-hole conductors are not connected in a series.