Real-Time Industrial Bus Time-Slice Allocation and Header Removal

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Solution Overview

Problem

Existing industrial buses, such as Ethernet and CAN bus, suffer from poorly real-time data transmission due to heavy network loads and collision detection mechanisms, leading to transmission bottlenecks and reduced performance in high-precision applications like servo systems and robots.

Innovation Solution

A method for implementing a real-time industrial internet field broadband bus that allocates non-overlapping time slices to bus terminals based on their number and priority, using a bus controller to synchronize clocks and manage data transmission, ensuring that only one device operates at a time, thus preventing collisions and ensuring real-time data transmission.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If data are transmitted over Ethernet using CSMA/CD mode, then the network can accommodate multiple devices, but the real-time performance deteriorates when network load exceeds 40%

Engineering Contradiction:
Improvenetwork capacityVSAvoidreal-time performance
Core Design Contradiction:
Adaptability or versatilityVSLoss of time

Solution Approach 1:

The patent segments the transmission channel into dedicated time slots for different devices, transforming the shared Ethernet medium into multiple dedicated transmission paths. This segmentation eliminates collisions by ensuring each device transmits only during its allocated time slot, thereby maintaining real-time performance while supporting multiple devices.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements periodic time-division multiplexing where each device is assigned recurring time slots for transmission. This periodic structure ensures deterministic transmission timing, preventing collisions and guaranteeing real-time performance while accommodating multiple devices through structured periodic access.

Inventive Principle:
Principle #19Periodic action

2Ease of operation

If CAN bus uses event trigger mechanism, then devices can communicate freely, but transmission rate decreases due to collisions and arbitration

Engineering Contradiction:
Improvecommunication freedomVSAvoidtransmission rate
Core Design Contradiction:
Ease of operationVSSpeed

Solution Approach 1:

The patent applies preliminary action by pre-allocating time slots to devices before transmission occurs. This eliminates the need for runtime arbitration and collision resolution, ensuring high transmission rates while maintaining communication freedom through pre-established transmission rights.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces dynamic time slot allocation that can adapt to different communication needs. By dynamically assigning time slots based on device priorities and communication requirements, the system maintains both high transmission rates and operational flexibility without collisions.

Inventive Principle:
Principle #15Dynamics

3Adaptability or versatility

If master and slave stations operate on CAN bus, then nodes communicate freely over wide channel, but transmission rate lowers due to channel occupation

Engineering Contradiction:
Improvecommunication flexibilityVSAvoidtransmission rate
Core Design Contradiction:
Adaptability or versatilityVSSpeed

Solution Approach 1:

The patent segments the shared CAN bus channel into dedicated time slots for master and slave stations. This segmentation allows multiple nodes to communicate freely during their respective time slots without channel occupation conflicts, maintaining both communication flexibility and high transmission rates.

Inventive Principle:
Principle #1Segmentation

4Ease of operation

If EtherCAT message uses legacy Ethernet frame with MAC address, then addressing is enabled, but message length increases causing transmission delay

Engineering Contradiction:
Improveaddressing capabilityVSAvoidtransmission delay
Core Design Contradiction:
Ease of operationVSLoss of time

Solution Approach 1:

The patent extracts and removes the legacy Ethernet frame structure, MAC addresses, and IP headers from the data transmission protocol. By taking out these redundant addressing layers and replacing them with simplified time-slot-based addressing, the message length is reduced significantly, eliminating transmission delays while maintaining addressing capability through the time slot assignment system.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentEP3261298B1Method for implementing a real-time industrial internet field broadband bus
Publication Date: 2020.04.29 KYLAND TECH CO LTD
  • EP3261298B1 patent drawingFigure 1a~1b
  • EP3261298B1 patent drawingFigure 2~3
  • EP3261298B1 patent drawingFigure 4~5

AI summary

The invention discloses a method for implementing a real-time industrial internet field broadband bus, the method including: determining, by a bus controller, the number of bus terminals connected therewith; and allocating, by the bus controller, time slices for the bus terminals according to the number of bus terminals, and transmitting, by the bus controller, the time slices to the bus terminals so that the bus terminals operate in the allocated time slices. Moreover data are transmitted in the bus system by removing Ethernet/IP message header information to thereby reduce the length of the message, and shorten a transmission delay and a bus scan periodicity so as to improve the real-time characteristic of the bus system. With the embodiments of the invention, there will be at most one device performing data process over the bus in one time slice, and the length of the message can be reduced, thus avoiding transmission data over the bus from colliding with each other and being blocked, and guaranteeing real-time data transmission.