Inertial Sensor Trench Insulation for Low Parasitic Capacitance
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Solution Overview
Problem
Existing inertial sensors face issues with increased parasitic capacitance and bias characteristic deterioration due to conductive material insertion between semiconductor layers, leading to reliability concerns and potential wiring cracks during manufacturing.
Innovation Solution
The proposed solution involves forming a trench portion in a semiconductor layer with thermal oxide films on both sides, physically contacting and filling the trench with planarization insulating films to reduce parasitic capacitance and ensure reliable wiring formation, using a method that includes thermal oxidation and planarization techniques.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conductive material is inserted between fixed electrode and outer peripheral portion to achieve electrical separation, then electrical insulation is improved, but parasitic capacitance increases and bias characteristics deteriorate
Solution Approach 1:
The patent introduces an insulator-filled trench groove as an intermediary structure between the fixed electrode and outer peripheral portion. Instead of directly inserting conductive material, the patent uses an insulator material (such as oxide or nitride) to fill the trench, providing electrical insulation while preventing parasitic capacitance formation. This intermediary insulating layer acts as a mediator that achieves electrical separation without the harmful effects of conductive material insertion.
Solution Approach 2:
The patent extracts the problematic conductive material from the trench filling and replaces it with insulator material. By removing the conductive component that causes parasitic capacitance while maintaining the structural separation function, the patent resolves the contradiction between achieving electrical insulation and preventing parasitic capacitance.
2Reliability
If trench is filled with thermal oxide film to achieve insulation, then electrical separation is improved, but surface irregularities remain and wiring cracks may occur
Solution Approach 1:
The patent merges multiple insulating layers (such as oxide film and nitride film) to fill the trench groove. By combining different insulator materials with complementary properties, the patent achieves both electrical separation and surface planarization. The multi-layer structure compensates for surface irregularities while maintaining insulation performance.
Solution Approach 2:
The patent changes the physical and chemical parameters of the insulator material, specifically selecting materials with appropriate dielectric constants and mechanical properties. By adjusting the type, thickness, and composition of insulator layers, the patent optimizes both electrical separation and surface flatness, preventing wiring cracks while maintaining insulation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces parasitic capacitance, enhances bias characteristics, and ensures high reliability of inertial sensors by optimizing the thickness and planarization of oxide films, preventing wiring failures and improving insulation performance.
Implementation Method 1
thermally oxidizing the first semiconductor layer and the second semiconductor layer to form a first oxide film and a second oxide film
Data Source
AI summary
An inertial sensor includes: a substrate; an insulating film provided on a main surface of the substrate; a first semiconductor layer and a second semiconductor layer which are provided on an opposite-side surface of the insulating film from the substrate; a first oxide film provided on a first side surface of the first semiconductor layer on a second semiconductor layer side; a second oxide film provided on a second side surface of the second semiconductor layer on a first semiconductor layer side; a planarization insulating film provided above the first oxide film and the second oxide film and between the first oxide film and the second oxide film; and a wiring provided on the planarization insulating film and electrically coupled to the second semiconductor layer.