In-field System Testing for CPU Failure Detection

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Solution Overview

Problem

Current in-field system testing for CPU failures in high-performance computing systems is limited in coverage and requires invasive, sensitive procedures that expose proprietary information, making it undesirable for customers to perform comprehensive diagnostics without compromising security.

Innovation Solution

Implementing dedicated hardware on-die and in-system for in-field system testing (IFST) that allows select end-users to run high-volume manufacturing-like tests on demand, with encrypted and signed test sequences stored in flash memory, enabling comprehensive diagnostics without exposing sensitive intellectual property.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If comprehensive in-field system testing is performed to detect CPU failures, then detection coverage is improved, but proprietary information security deteriorates due to invasive test procedures

Engineering Contradiction:
ImproveCPU failure detection coverageVSAvoidProprietary information security
Core Design Contradiction:
Measurement precisionVSLoss of information

Solution Approach 1:

The system segments testing authority by implementing dedicated hardware on-die and in-system that enables select end-users to run tests independently without requiring Intel employee intervention or monitored test configurations. This segmentation allows comprehensive diagnostics while protecting proprietary information by eliminating the need for centralized controlled testing.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements high-volume manufacturing-like tests stored in flash memory that can be executed locally on the system. By copying the test sequences to flash memory and enabling local execution, the system achieves comprehensive CPU failure detection without requiring access to proprietary test equipment or procedures held by the manufacturer.

Inventive Principle:
Principle #26Copying

2Loss of information

If monitored test configurations are used to ensure security, then information security is improved, but ease of operation deteriorates due to required employee intervention

Engineering Contradiction:
ImproveIntellectual property protectionVSAvoidTest execution convenience
Core Design Contradiction:
Loss of informationVSEase of operation

Solution Approach 1:

The system implements self-service testing by enabling select end-users to autonomously execute comprehensive CPU diagnostics using dedicated hardware on-die and in-system. The test sequences are stored locally in flash memory, allowing users to perform high-volume manufacturing-like tests without requiring Intel employee intervention or monitored configurations, thus achieving both security and ease of operation.

Inventive Principle:
Principle #25Self-service

3Measurement precision

If invasive test procedures are implemented to achieve high detection coverage, then reliability of detection is improved, but device complexity increases due to specialized test hardware and procedures

Engineering Contradiction:
ImproveFailure detection accuracyVSAvoidTest system complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent merges high-volume manufacturing-like tests with in-field system testing by implementing dedicated hardware on-die and in-system that can execute the same comprehensive test sequences used in manufacturing. This consolidation achieves high failure detection accuracy while reducing complexity by using unified test procedures across manufacturing and field environments, stored locally in flash memory.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS10859627B2In-field system testing
Publication Date: 2020.12.08 INTEL CORP
  • US10859627B2 patent drawing
  • US10859627B2 patent drawing
  • US10859627B2 patent drawing

AI summary

A processor, including: a core; system test circuitry, the system test circuitry to be locked during operational processor operation; reset circuitry including a kick-off test (KOT) input, the reset circuitry to detect a reset with the KOT input asserted, and to initiate an in-field system test (IFST) mode; a test interface controller to receive in IFST mode an encrypted test packet having a signature, verify the signature of the test packet, and decrypt the test packet; and IFST control circuitry to cause the system test circuitry to perform an IFST test according to the decrypted test packet and to log or report results.