Infiniband Switch VCRC Check and Generation
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Solution Overview
Problem
Infiniband switches face challenges in reducing latency and increasing efficiency due to the need for robust error checking, which increases buffer sizes and costs, and the requirement to check and recalculate Variant Cyclic Redundancy Check (VCRC) values as packets traverse the switch, affecting transfer speeds.
Innovation Solution
An Infiniband switch design that determines the output virtual lane for a packet and stores this information in a non-checksum protected field, allowing simultaneous packet transfer and integrity checking, with the VCRC calculation performed in a protected field, optimizing latency and reducing memory costs without compromising data integrity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If robust error checking with parity or ECC checking is used to protect internal packet buffers, then data integrity is improved, but buffer sizes must be increased which increases chip cost and causes scalability issues
Solution Approach 1:
The patent extracts the error checking function from the buffer protection mechanism and applies it only to specific critical fields (virtual lane field, service level field, and other protected fields) in the packet header, rather than protecting the entire buffer content. This selective approach reduces the amount of data requiring error checking while maintaining integrity where needed.
Solution Approach 2:
The patent applies different error checking strategies to different parts of the packet: VCRC is applied selectively to specific header fields that may change during switching, while other fields use appropriate protection mechanisms. This localized application of error checking reduces overall overhead compared to universal buffer protection.
2Reliability
If VCRC is checked at the inbound port and calculated at the outbound port to accommodate virtual lane field changes, then data integrity is maintained, but transfer speeds are reduced increasing latency through the switch
Solution Approach 1:
The patent performs preliminary VCRC calculation at the inbound port for fields that will not change (such as the payload and invariant header fields). This pre-calculated VCRC value is stored and later combined with the VCRC of fields that do change at the outbound port, avoiding the need to recalculate the entire VCRC and reducing latency.
Solution Approach 2:
The patent segments the VCRC calculation into multiple parts: invariant fields are calculated at the inbound port, variable fields (virtual lane, service level) are handled at the outbound port, and the final VCRC is constructed by combining these segments. This segmentation allows parallel processing and reduces the critical path delay.
3Reliability
If the virtual lane field is protected by VCRC and the VCRC has to be checked and recalculated as the packet passes through the switch, then data integrity is ensured, but transfer speeds are reduced
Solution Approach 1:
The patent calculates the VCRC for the virtual lane field and other variable fields at the outbound port before the packet is transmitted, using the new virtual lane value. This pre-calculation ensures that the VCRC is ready when the packet leaves the switch, maintaining data integrity without requiring post-transmission verification that would slow down subsequent packets.
Solution Approach 2:
The patent maintains continuous VCRC validation by checking the VCRC of invariant fields at the inbound port and combining it with the VCRC of variable fields at the outbound port. This continuous approach ensures data integrity is maintained throughout the packet's journey through the switch without interrupting the data flow.
Data Source
AI summary
An Infiniband switch can be provided. The switch can have an input port logic unit for determining an output virtual lane for a received packet and for storing a descriptor of the determined output virtual lane in a packet field not protected by a checksum field of the packet. The switch can also have a routing unit for transferring the received packet to an output port corresponding to the determined output virtual lane. Additionally, the switch can have an output port logic unit for simultaneously checking the integrity of the packet transferred through the routing unit and calculating a new value for the checksum with the descriptor moved to a correct packet field, which field is included in the calculation of the checksum.