Inflected Through-Electrode Circuit Board for Dense Chip Packaging
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The challenge is to minimize the spacing between processor chips on a circuit board while maintaining high communication speed and reducing power consumption, as increased spacing leads to decreased signal exchange speed, increased power consumption, and vulnerability to noise due to longer signal transmission paths.
Innovation Solution
The circuit board incorporates through holes and through electrodes with inflected portions having different inclinations, allowing for a reduction in the width of the through electrodes and improved adhesion by exposing glass fibers in the dense glass fiber region, which enhances the roughness of the inner wall and improves the connection between the insulating layer and the through electrode.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If the spacing between processor chips is increased, then the chip mounting area is reduced, but the communication speed decreases and power consumption increases
Solution Approach 1:
The patent transitions from horizontal spacing optimization to vertical dimension utilization by forming through electrodes that penetrate the substrate thickness direction. This allows chips to be positioned closer horizontally while maintaining signal integrity through optimized vertical electrode paths with inflected portions that navigate around obstacles and minimize length.
Solution Approach 2:
The through electrodes are designed with different inflected portions having different inclinations optimized for specific local regions. Each inflected portion is tailored to navigate around local obstacles (circuit pattern layers) while maintaining overall electrode functionality, allowing localized optimization without compromising the entire electrode structure.
2Area of stationary object
If the spacing between processor chips is increased, then the chip mounting area is reduced, but power consumption increases
Solution Approach 1:
By utilizing the vertical dimension to create optimized through electrode paths, the patent reduces the horizontal spacing requirement between chips. This enables shorter overall signal transmission paths that consume less power while maintaining compact chip arrangement.
Solution Approach 2:
The patent optimizes the inclination angles of different inflected portions of through electrodes to minimize electrode length and signal transmission path. By carefully controlling geometric parameters of the electrode structure, power consumption is reduced while maintaining electrical connectivity.
3Area of stationary object
If the spacing between processor chips is increased, then the chip mounting area is reduced, but signal transmission loss increases due to longer trace length
Solution Approach 1:
The through electrodes penetrate the substrate in the thickness direction with optimized inflected portions, creating direct vertical communication paths between chips. This eliminates long horizontal trace routes, significantly reducing signal transmission loss while enabling compact chip spacing.
Solution Approach 2:
Each inflected portion of the through electrode is locally optimized to navigate around circuit pattern layers with minimal deviation from the direct path. This local optimization ensures that the overall electrode length remains minimized, reducing signal transmission loss.
4Productivity
If the width of through electrodes is reduced, then the circuit integration is improved, but the manufacturing precision requirement increases
Solution Approach 1:
The through electrodes are designed with different inflected portions having different inclinations optimized for specific manufacturing stages. The first inflected portion facilitates easier formation during drilling or etching, while the second inflected portion achieves the final narrow width requirement, dividing the precision requirement across multiple manufacturable steps.
Solution Approach 2:
The through electrode structure is segmented into multiple inflected portions, each serving a specific function in the manufacturing process. This segmentation allows each portion to be optimized for its specific manufacturing challenge, making the overall narrow width electrode more manufacturable.
5Adaptability or versatility
If the number of connection wires between processor chips is increased, then the functionality is improved, but the circuit pattern complexity increases
Solution Approach 1:
The patent utilizes the vertical dimension by forming multiple through electrodes that penetrate the substrate thickness direction. This allows numerous connection wires to be packed vertically through the substrate, enabling increased processor functionality without proportionally increasing horizontal circuit pattern complexity.
Solution Approach 2:
The through electrode structure serves multiple functions simultaneously: providing electrical connectivity, acting as a mechanical support structure, and enabling compact chip arrangement. This multi-functionality reduces the need for additional dedicated structures, simplifying the overall circuit pattern.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design reduces the overall size of the through electrodes, enhances circuit integration, and improves the physical and electrical reliability of the circuit board by minimizing the difference in width between the upper and lower surfaces of the through electrodes, thus addressing the limitations of existing technologies in reducing electrode size and enhancing signal transmission.
Implementation Method 1
improved adhesion by exposing glass fibers in the dense glass fiber region, which enhances the roughness of the inner wall and improves the connection between the insulating layer and the through electrode
Data Source
AI summary
A circuit board according to an embodiment includes a first insulating layer including an upper and lower surface; a first through electrode passing through the upper and lower surfaces of the first insulating layer; and a first circuit pattern layer disposed on a lower surface of the first insulating layer, wherein the first through electrode includes: a first electrode part disposed adjacent to the lower surface of the first insulating layer and having a first inclination; and a second electrode part disposed adjacent to the upper surface of the first insulating layer and having a second inclination that is different from the first inclination so that a width gradually decreases toward the first upper surface of the first insulating layer, and wherein the first electrode part non-overlaps in a horizontal direction with the first circuit pattern layer.


