In-flight Packet Processing via Pre-allocated Work Queues
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Solution Overview
Problem
Current packet processing systems face inefficiencies in handling large packets, as they require complete packet writing into memory before processing can begin, leading to increased latency and reduced throughput.
Innovation Solution
The implementation of a packet engine that allows microengines to request packet processing before the packet arrives, enabling the addition to a work queue and processing of packet headers before the entire packet is written into memory, utilizing a Packet Portion Identifier (PPI) for efficient allocation and processing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the system waits for the entire packet to be written into memory before processing, then memory integrity is ensured, but processing latency increases and throughput decreases
Solution Approach 1:
The microengine sends an add-to-work-queue request to the packet engine before the packet data is fully received. The packet engine pre-allocates a packet portion identifier (PPI) and prepares the work queue entry in advance. When the packet arrives, processing can begin immediately without waiting for complete memory write, as the processing circuit can access packet data directly from the data source device while it is being written to memory.
Solution Approach 2:
The packet processing is divided into segments: the header portion can be processed separately from the payload portion. The processing circuit receives the PPI and can access and process the header portion of the packet data before the entire packet is written into memory, while the payload portion is being written to internal or external memory.
2Productivity
If multiple packets are forwarded to the same specialized processor, then resource utilization improves, but queue management complexity increases
Solution Approach 1:
The packet engine acts as an intermediary between the data source device and the processing circuit. It manages the work queue, allocates PPIs, and coordinates packet delivery to processing circuits. The packet engine receives add-to-work-queue requests, manages packet portion identifiers, and handles the coordination of packet data flow from multiple sources to processing circuits, simplifying the overall system architecture.
3Speed
If large packets are processed only after complete memory write, then data完整性 is ensured, but processing speed decreases
Solution Approach 1:
The system performs preliminary actions by pre-allocating packet portion identifiers and preparing work queue entries before the packet data is fully received. This allows the processing circuit to begin accessing and processing packet data immediately upon arrival, eliminating the waiting time that would otherwise be required for complete memory write operations.
Solution Approach 2:
The processing circuit can perform partial processing on the packet data before it is fully written to memory. Specifically, the header portion can be accessed and processed while the payload portion is still being written to internal or external memory, allowing useful work to be done on a portion of the data without waiting for the entire packet.
Data Source
AI summary
A method for supporting in-flight packet processing is provided. Packet processing devices (microengines) can send a request for packet processing to a packet engine before a packet comes in. The request offers a twofold benefit. First, the microengines add themselves to a work queue to request for processing. Once the packet becomes available, the header portion is automatically provided to the corresponding microengine for packet processing. Only one bus transaction is involved in order for the microengines to start packet processing. Second, the microengines can process packets before the entire packet is written into the memory. This is especially useful for large sized packets because the packets do not have to be written into the memory completely when processed by the microengines.