InFO-POP Reference Via Shielding for Compact Semiconductor Packaging
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Solution Overview
Problem
The semiconductor industry faces challenges in further reducing the physical size of semiconductor devices while maintaining functionality, as traditional bonding processes are inefficient and require additional packaging steps, leading to increased costs and complexity.
Innovation Solution
A method involving the use of reference vias and through vias in a stacked semiconductor device configuration, where the semiconductor dies are bonded between these vias and encapsulated with a polymer layer, allowing for efficient electrical connections and reduced package size through a redistribution layer and shield coating, enabling miniaturization without additional ground pads or increased process complexity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional bonding processes are used to bond semiconductor dies, then electrical connections can be established, but the process complexity and packaging steps increase
Solution Approach 1:
The patent combines the bonding process with the formation of reference vias and through vias into a single integrated process. The dies are bonded between the vias, and the same structures serve multiple functions: providing mechanical support, establishing electrical connections, and enabling signal redistribution. This eliminates the need for separate bonding and via formation steps, reducing overall process complexity while maintaining reliable electrical connections.
Solution Approach 2:
The reference vias and through vias serve multiple functions simultaneously: they provide mechanical alignment and support during bonding, establish electrical connections between stacked dies, enable signal redistribution through the stack, and serve as reference structures for shielding. This multi-functionality reduces the number of separate process steps needed while achieving all necessary objectives.
2Object-affected harmful factors
If additional ground pads are added for shielding, then electromagnetic interference protection is improved, but the package size increases
Solution Approach 1:
The patent merges the shielding function with the existing reference vias and through vias structures. These vias are already necessary for mechanical support and electrical connections, so adding shielding functionality to them eliminates the need for separate ground pads. The same via structures provide both structural/electrical functions and electromagnetic interference protection, maintaining compact package size while improving EMI protection.
Solution Approach 2:
The reference vias and through vias are designed to serve multiple functions: mechanical support, electrical interconnection, signal redistribution, and electromagnetic shielding. By making these structures multi-functional, the patent avoids adding extra components like separate ground pads that would increase package size, while still achieving comprehensive EMI protection.
3Productivity
If minimum feature size is reduced to increase integration density, then more components can be integrated, but manufacturing precision requirements increase
Solution Approach 1:
The patent segments the via structures into reference vias and through vias with distinct functions. The reference vias provide stable reference structures for alignment and shielding, while the through vias handle signal routing. This segmentation allows each type of via to be optimized independently, with reference vias serving as precision reference points that reduce the cumulative alignment errors that would otherwise accumulate in miniaturized structures, thereby enabling higher integration density without proportionally increasing manufacturing precision requirements.
Data Source
AI summary
An integrated fan out package on package architecture is utilized along with a reference via in order to provide a reference voltage that extends through the InFO-POP architecture. If desired, the reference via may be exposed and then connected to a shield coating that can be used to shield the InFO-POP architecture. The reference via may be exposed by exposing either a top surface or a sidewall of the reference via using one or more singulation processes.