InFO Package Dummy Structures and Underfill Void Reduction
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Solution Overview
Problem
The semiconductor industry faces challenges in achieving efficient integration and packaging of electronic components due to limitations in feature size reduction and packaging structures, which affect the integration density and structural strength of semiconductor packages.
Innovation Solution
The method involves forming a through-integrated fan-out (InFO) package structure with conductive features, redistribution lines, and dummy structures, along with underfills, to enhance electrical connectivity and structural integrity by reducing void ratios and facilitating capillary flow of underfills, thereby improving the overall strength and reliability of the package.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If conventional packaging structures are used, then manufacturing simplicity is maintained, but integration density and structural strength deteriorate
Solution Approach 1:
The package structure is divided into multiple functional layers including dielectric layers, conductive features, and underfill regions. Each layer performs a specific function, allowing complex integration while maintaining manufacturability through standardized layer-by-layer fabrication processes
Solution Approach 2:
The patent transitions from planar 2D packaging to 3D vertical stacking with multiple dielectric layers and conductive vias. This dimensional change enables higher integration density by utilizing vertical space, accommodating more components within the same footprint area
2Quantity of substance
If feature size is reduced to increase integration density, then component count increases, but structural strength and reliability deteriorate
Solution Approach 1:
The patent applies different material properties and structural characteristics to different regions of the package. Underfill is applied in specific regions between components, dielectric materials are selected for particular layers based on electrical requirements, and conductive features are strategically placed to provide both electrical connectivity and mechanical support where needed
Solution Approach 2:
The package structure utilizes composite construction with multiple materials including dielectric materials, conductive materials, and underfill compounds. This composite approach allows optimization of each material for its specific function while collectively providing both high integration density and enhanced structural reliability
3Reliability
If void ratios are not controlled, then manufacturing is simpler, but electrical connectivity and structural integrity deteriorate
Solution Approach 1:
Underfill is applied in advance to specific regions before final assembly steps. This preliminary action prevents void formation during subsequent processing, ensures proper capillary flow to fill gaps, and establishes reliable electrical and mechanical connections before the package is completed
Solution Approach 2:
The underfill acts as an intermediary material between components and the substrate. It facilitates capillary flow to eliminate voids, provides mechanical support to maintain structural integrity, and enables reliable electrical connectivity by filling gaps between conductive features
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables improved integration density, structural strength, and reliable electrical connections within semiconductor packages by reducing void ratios and enhancing the capillary flow of underfills, addressing the limitations of existing packaging technologies.
Implementation Method 1
facilitating capillary flow of underfills
Data Source
AI summary
A package structure includes a molding material, at least one through-via, at least one conductor, at least one dummy structure and an underfill. The through-via extends through the molding material. The conductor is present on the through-via. The dummy structure is present on the molding material and includes a dielectric material. The underfill is at least partially present between the conductor and the dummy structure.