Infrared Sensor Membrane Grid Openings for Etching
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Solution Overview
Problem
Existing infrared thermal sensors face challenges in achieving robust mechanical integrity and high sensitivity due to limitations in etching techniques, which often result in reduced heat storage capacity and structural integrity of the membrane, especially when using anisotropic etchants like TMAH, which struggle with certain crystal orientations and angles.
Innovation Solution
The solution involves creating a semiconductor infrared thermal sensor with a membrane and beams that utilize a specific arrangement of openings to facilitate fast etching and optimal thermal isolation, using anisotropic etchants like TMAH or KOH, while maintaining mechanical integrity by orienting openings according to different crystallographic directions and ensuring good passage for the etchant, and sealing the cavity with a cap under controlled pressure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the etch depth is increased to reduce heat loss via conduction, then thermal isolation is improved, but the mechanical integrity of the membrane is worsened
Solution Approach 1:
The membrane is segmented with a grid pattern of openings that allow anisotropic etchant to penetrate and release the membrane from the substrate. This segmentation enables thermal isolation through the beams while maintaining membrane integrity by providing controlled release paths rather than requiring deep etching that would compromise structural strength.
Solution Approach 2:
The solution transitions from increasing etch depth (vertical dimension) to creating a grid pattern of openings (horizontal dimension). The openings are arranged in a two-dimensional grid that allows etchant access from the top surface, enabling membrane release without requiring deep lateral etching that would weaken the membrane structure.
2Productivity
If anisotropic etchants like TMAH are used to etch the cavity, then etching speed is improved, but etching efficiency in certain crystal orientations is worsened
Solution Approach 1:
The grid pattern segments the etching process into multiple access points distributed across the membrane surface. This segmentation allows the anisotropic etchant to reach the cavity from multiple locations, compensating for directional etching limitations and achieving more uniform cavity release without sacrificing overall etching speed.
Solution Approach 2:
The grid opening pattern serves multiple functions: it allows etchant access from the top surface, provides mechanical support during processing, and compensates for anisotropic etching limitations. This multi-functional design enables the use of fast anisotropic etchants while achieving uniform cavity release across different crystal orientations.
3Reliability
If the membrane area is increased to improve heat storage capacity, then sensitivity is improved, but the structural integrity is worsened
Solution Approach 1:
The membrane incorporates a grid pattern of openings that segment the continuous membrane structure. This segmentation provides internal reinforcement that maintains structural integrity while allowing the overall membrane area to be increased for improved heat storage capacity and sensitivity. The grid acts as a structural framework that prevents excessive deformation.
Solution Approach 2:
The membrane is designed with a porous grid structure that maintains mechanical strength through the open framework while providing large surface area for infrared absorption. The porous nature allows the membrane to achieve both high sensitivity through increased heat storage capacity and maintained structural integrity through the rigid grid framework.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for efficient membrane release and enhanced thermal isolation, maintaining mechanical integrity and sensitivity, while optimizing the etching process for faster and more effective production of infrared thermal sensors.
Implementation Method 1
The openings are adapted for facilitating the passage of an anisotropic etchant for etching the cavity underneath the membrane during manufacture of the infrared thermal sensor
Implementation Method 2
the width direction of a first set comprising at least two openings of this plurality of openings is substantially oriented according to a first crystallographic orientation of the semiconductor substrate, in which this first crystallographic orientation corresponds to a direction lying in a loosely packed crystal lattice face of the semiconductor substrate
Implementation Method 3
integrated semiconductor infrared thermal sensors are known in the field which absorb the infrared radiation emitted by the object on a membrane
Implementation Method 4
This membrane will thus heat up due to the absorption of the received infrared radiation
Implementation Method 5
A thermocouple will generate a voltage difference depending on the temperature difference between the two nodes of the thermocouple and the type of the material
Implementation Method 6
The heat from the membrane can dissipate through the air above and under the membrane. Heat loss via this heat loss path can be reduced by increasing the etch depth
Implementation Method 7
The heat from the membrane can dissipate through the air above and under the membrane
Data Source
Figure 1
Figure 2
Figure 3~5
AI summary
The invention relates to an infrared thermal sensor (1) comprising a substrate (2) having a cavity (3), a cavity bottom wall formed by a continuous substrate surface. The sensor comprises a membrane (4) adapted for receiving heat from incident infrared radiation, a beam (8) suspending the membrane (4), and a thermocouple (9). This membrane comprises openings (5,6) extending through the membrane (4) for facilitating the passage of an anisotropic etchant for etching the cavity (3) during manufacture. Each opening has a cross-section with a length to width ratio of at least 4. The width direction of respectively a first and a second set of openings is oriented according to respectively a first crystallographic orientation (Y) and a second crystallographic orientation (Z), these orientations (Y;Z) corresponding to different directions lying in loosely packed crystal lattice faces of the semiconductor substrate.