InGaAs Light-Absorbing Layer Tuning for ESD-Resistant Photoreceivers
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Solution Overview
Problem
Semiconductor light-receiving elements used in infrared sensors require high electrostatic discharge (ESD) withstand voltage and high light reception sensitivity, which existing technologies struggle to balance.
Innovation Solution
A semiconductor light-receiving element with a specific thickness and carrier density of the InGaAs light-absorbing layer, combined with a p-type impurity diffusion region, achieves high ESD withstand voltage while maintaining light reception sensitivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the InGaAs light-absorbing layer is made thin to increase ESD withstand voltage, then ESD withstand voltage is improved, but light reception sensitivity is substantially reduced
Solution Approach 1:
The patent changes the carrier density parameter of the InGaAs light-absorbing layer by introducing n-type impurities at specific concentrations (1×10^16 to 1×10^17 atoms/cm³). This parameter modification allows the layer to maintain higher thickness (0.5-2.0 μm) for light reception while achieving sufficient ESD withstand voltage through controlled carrier density rather than relying solely on thinning the layer.
2Measurement precision
If the InGaAs light-absorbing layer is made thick to maintain light reception sensitivity, then light reception sensitivity is improved, but ESD withstand voltage is reduced
Solution Approach 1:
The patent modifies the electrical parameters of the InGaAs light-absorbing layer by controlling n-type impurity concentration. This allows the layer to maintain sufficient thickness (0.5-2.0 μm) for high light reception sensitivity while achieving adequate ESD withstand voltage (100 V or more) through the controlled carrier density, resolving the trade-off between thickness and ESD performance.
3Reliability
If n-type impurity concentration is increased to improve ESD withstand voltage, then ESD withstand voltage is significantly improved, but light reception sensitivity is reduced
Solution Approach 1:
The patent optimizes the n-type impurity concentration within a specific range (1×10^16 to 1×10^17 atoms/cm³) to achieve the desired balance. This controlled parameter change provides sufficient ESD withstand voltage improvement while minimizing the impact on light reception sensitivity, unlike higher concentration doping that would significantly degrade optical performance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution provides a semiconductor light-receiving element with ESD withstand voltage of 1500 V or higher and minimal reduction in light reception sensitivity.
Implementation Method 1
an n-type InGaAs light-absorbing layer on the n-type InP substrate
Implementation Method 2
a p-type impurity diffusion region that reaches an upper part of the n-type InGaAs light-absorbing layer is formed in the InP window layer
Data Source
AI summary
Provided is a semiconductor light-receiving element having high light reception sensitivity and high ESD withstand voltage. The semiconductor light-receiving element (100) includes an n-type InP substrate (110), an n-type InGaAs light-absorbing layer (130), and an InP window layer (140). A p-type impurity diffusion region (150) that reaches an upper part of the n-type InGaAs light-absorbing layer (130) is formed in the InP window layer (140). The n-type InGaAs light-absorbing layer (130) has a thickness of 2.2 μm or more and a carrier density due to an n-type impurity of 2.5×1015/cm3 or more.