Injection-Locked Frequency Multiplier Lock Detection by Subsampling

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Solution Overview

Problem

Existing injection-locked frequency multiplier devices face challenges with high power consumption, especially when operating at high frequencies and with high frequency multiplication factors, making them inefficient for millimeter wave applications.

Innovation Solution

A device comprising a downsampler and control circuit that adjusts the locking of an injection-locked frequency multiplier by determining the continuity of a sub-sampled signal to assess locking status, eliminating the need for high-frequency dividers and reducing power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If high-frequency dividers are used to determine locking status, then measurement precision is improved, but power consumption increases

Engineering Contradiction:
Improvelocking status detection accuracyVSAvoidpower consumption
Core Design Contradiction:
Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The patent introduces a downsampler as an intermediary device that converts high-frequency signals to low-frequency signals before processing. The downsampler receives the high-frequency output signal from the frequency multiplier and transforms it into a lower frequency domain where the locking status can be detected without requiring power-hungry high-frequency dividers, thus resolving the contradiction between measurement precision and power consumption

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent replaces the traditional mechanical/electronic high-frequency divider system with a signal processing approach using downsampling. Instead of using physical high-frequency division circuits that consume significant power, the system uses temporal downsampling of the signal waveform to extract locking information in the time domain, substituting a power-intensive hardware approach with a more efficient signal processing method

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Productivity

If conventional frequency multiplication methods are used, then frequency synthesis capability is achieved, but power consumption is high

Engineering Contradiction:
Improvefrequency synthesis capabilityVSAvoidpower consumption
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

The downsampler acts as an intermediary between the frequency multiplier output and the locking detection circuitry. By inserting this downsampling stage, the system can maintain full frequency synthesis capability at high frequencies while the subsequent detection operates at lower frequencies, reducing overall power consumption without sacrificing productivity

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent applies partial action by only downsampling the signal portion needed for locking detection, rather than processing the entire high-frequency signal chain. This selective downsampling of just the feedback signal for locking status determination allows the main frequency synthesis operation to continue at full performance while minimizing the power consumption of the detection subsystem

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentEP3624343B1Device for adjusting the locking of a frequency multiplier with locking by injection
Publication Date: 2021.04.07 COMMISSARIAT A LENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
  • EP3624343B1 patent drawingFigure 1~2
  • EP3624343B1 patent drawingFigure 3
  • EP3624343B1 patent drawingFigure 4a~4d

AI summary

Device (102) for adjusting the locking of an injection-locked frequency multiplier (104), comprising: - a first input (116) receiving a first signal of frequency f1, and a second input (114) receiving a second signal of frequency f2 delivered at the output of the frequency multiplier; - a subsampler (112) of the second signal; - a control circuit (120) configured to: • receive a third signal corresponding to the second signal subsampled by the first signal or by another signal of frequency multiple of f1, then • perform high-pass or band-pass filtering of the third signal; • determine that the frequency multiplier is locked on a multiple of f1 when the signal obtained after filtering is zero, then • deliver a signal whose value is representative of whether or not the frequency multiplier is locked.