Injection-Locked BPSK Receiver for Low-Power Accurate Demodulation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The complexity of COSTAS loop circuits in coherent detection of Phase Shift Keying (PSK) signals limits power consumption reduction, hindering advancements in wireless communication systems.
Innovation Solution
A receiver architecture utilizing injection-locked oscillators and phase-locked loops to transform BPSK signals into ASK signals, with feedback loops for accurate frequency selection and interference rejection, enhancing channel selection and reducing bit errors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If COSTAS loop circuit is used for coherent detection of PSK signals, then detection accuracy is improved, but power consumption increases and device complexity increases
Solution Approach 1:
The receiver is divided into two independent paths: a coherent detection path using COSTAS loop for accurate channel selection, and a non-coherent detection path using envelope detector for data demodulation. This segmentation allows each path to be optimized for its specific function, reducing overall power consumption while maintaining detection accuracy.
Solution Approach 2:
A frequency offset correction circuit is introduced as an intermediary component that processes the output from the coherent detection path and feeds corrected frequency information back to both detection paths. This mediator enables accurate frequency offset compensation without requiring the entire receiver to operate in high-power coherent mode.
2Measurement precision
If COSTAS loop circuit is used for coherent detection of PSK signals, then detection accuracy is improved, but device complexity increases
Solution Approach 1:
The receiver architecture segments the detection function into two separate paths with different complexity levels. The coherent detection path uses COSTAS loop only for channel selection where high precision is needed, while the main data demodulation uses the simpler envelope detector path, thereby reducing overall device complexity.
Solution Approach 2:
The complex COSTAS loop circuit is extracted from the main signal processing path and confined to a dedicated frequency offset correction function. This extraction allows the majority of the signal processing to be handled by simpler non-coherent detection circuits, reducing overall device complexity while preserving detection accuracy where needed.
3Reliability
If traditional coherent detection is used, then bit error rate performance is improved, but power consumption reduction is limited
Solution Approach 1:
The detection system is segmented into two modes: coherent detection for channel selection (low power, high reliability) and non-coherent envelope detection for data demodulation (lower power, adequate reliability). This segmentation achieves overall power reduction while maintaining acceptable bit error rate performance through the combined operation of both paths.
Solution Approach 2:
The system dynamically changes operating parameters by switching between coherent and non-coherent detection modes based on signal conditions. Frequency offset correction parameters are adjusted based on feedback from the coherent path, enabling reliable detection at lower power consumption levels than traditional continuous coherent detection.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed architecture achieves more accurate channel selection and reduced bit errors by operating injection-locked oscillators in closed-loop control systems, mitigating frequency inaccuracies and noise interference.
Implementation Method 1
A first injection-locked oscillator having a first input configured to receive a BPSK signal and a second input configured to receive a first frequency reference
Implementation Method 2
a first phase-locked loop coupled with the second input of the first injection-locked oscillator. The first phase-locked loop is configured to generate the first frequency reference
Data Source
AI summary
A receiver is described. The receiver includes a first injection-locked oscillator having a first input configured to receive a BPSK signal and a second input configured to receive a first frequency reference. The receiver also includes a second injection-locked oscillator having a third input configured to receive the BPSK signal and a fourth input configured to receive a second frequency reference. Further, the receiver includes a first phase-locked loop coupled with the second input of the first injection-locked oscillator. The first phase-locked loop is configured to generate the first frequency reference. And, a second phase-locked loop is coupled with the fourth input of the second injection-locked oscillator. The second phase-locked loop is configured to generate the second frequency reference.