Injection-Locked CDR Circuitry for Wide Delay Tracking
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Solution Overview
Problem
Existing clock and data recovery (CDR) systems face challenges in efficiently managing large delay ranges and high data rates, leading to increased power consumption and hardware complexity due to the need for phase interpolators and large delay cells.
Innovation Solution
The implementation of an injection-locked oscillator with a delay control on the injection clock path, rather than at the output of the oscillator, eliminates the need for phase interpolators and reduces hardware complexity. This approach delays all output phases of the multi-phase oscillator, allowing for a smaller range of delay in the delay circuitry and improved low-pass filtering.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If delay cells are used to cover large delay ranges in traditional CDR systems, then the delay tracking capability is improved, but the hardware area and power consumption increase
Solution Approach 1:
The delay range is segmented into multiple discrete steps rather than requiring continuous coverage. The delay circuit provides delay in incremental steps, and the multi-phase oscillator with phase selection achieves the required delay resolution without needing a large continuous delay range, thus reducing hardware area while maintaining adaptability.
Solution Approach 2:
The patent introduces a temporal dimension by using a multi-phase oscillator where delay is achieved through phase selection rather than purely temporal delay. By selecting different phases of the oscillator output, the system achieves effective delay without requiring proportionally large delay cell hardware, thus solving the area vs. adaptability contradiction.
2Measurement precision
If phase interpolators are added to achieve precise phase control, then the phase resolution is improved, but the device complexity increases
Solution Approach 1:
The patent extracts and eliminates the phase interpolator component from the traditional CDR architecture. Instead of using complex phase interpolators to achieve fine phase control, the system uses a multi-phase oscillator with direct phase selection, removing the problematic component while maintaining phase resolution through the oscillator's inherent multi-phase output structure.
3Measurement precision
If large delay cells are implemented to cover the required delay range, then the delay accuracy is improved, but the power consumption increases
Solution Approach 1:
The patent implements dynamic phase selection where the delay is adjusted by selecting different phases of the multi-phase oscillator based on feedback from the CDR circuit. This dynamic approach allows accurate delay tracking without requiring large static delay cells, thereby reducing power consumption while maintaining delay accuracy through adaptive phase switching.
4Area of stationary object
If the delay circuit range is reduced to save hardware, then the area usage is improved, but the ability to track large delays deteriorates
Solution Approach 1:
The patent compensates for the reduced delay circuit range by introducing phase wrapping around the multi-phase oscillator. When the delay reaches the maximum of the reduced-range delay circuit, the system wraps around to the next phase of the oscillator, effectively extending the tracking range without requiring proportionally larger delay hardware, thus maintaining adaptability while reducing area.
Data Source
AI summary
In an example, a circuit includes clock data recovery (CDR) circuitry having an input and an output. The circuit also includes a delay circuit having an input coupled to the output of the CDR circuitry, and having an output. The circuit includes a multi-phase oscillator having an input coupled to the output of the delay circuit, and having an output. The circuit also includes a divider having an input coupled to the output of the multi-phase oscillator, and having an output coupled to the input of the CDR circuitry.