Injection-Locked CDR Circuit for Fast Locking With Lower Jitter
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Traditional burst mode clock and data recovery (CDR) circuits amplify high-frequency jitter, degrading timing margin and requiring additional voltage controlled oscillators, which are power and area consuming.
Innovation Solution
A clock and data recovery circuit utilizing an injection locked oscillator with a two-stage ring oscillator and a programmable injection switch, coupled with a pulse generator and skew compensation block, to generate a recovered clock signal and compensate for phase errors, thereby improving locking stability and reducing jitter sensitivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If traditional burst mode CDR uses gated voltage controlled oscillator (GVCO) to achieve instant locking, then lock-in time is reduced to within several tens of bits, but absolute phase alignment with input data amplifies high frequency jitter and degrades timing margin
Solution Approach 1:
The patent introduces an injection-locked oscillator (ILO) as an intermediary between the input data and the voltage-controlled oscillator (VCO). The ILO receives injection signals from the input data and locks its phase to them, then drives the VCO. This intermediary approach allows instant phase alignment (achieving burst mode lock-in within tens of bits) while the ILO's injection mechanism naturally filters high-frequency jitter, preventing it from being amplified and thus preserving timing margin.
Solution Approach 2:
The patent changes the operating parameters of the oscillator system by using an injection-locked oscillator instead of a traditional gated VCO. The ILO is configured with specific injection ratios and locking ranges that enable it to achieve both fast lock-in and jitter suppression. By adjusting the injection strength and locking characteristics of the ILO, the system achieves instant phase alignment while maintaining robustness against high-frequency jitter.
2Speed
If traditional burst mode CDR uses gated voltage controlled oscillator (GVCO), then instant locking is achieved, but additional replica of voltage controlled oscillator based on phase locked loop is required to control local oscillator frequency
Solution Approach 1:
The injection-locked oscillator (ILO) performs multiple functions that previously required separate components. It provides instant phase alignment like the gated VCO, controls local oscillator frequency like the PLL replica, and suppresses jitter. By making the ILO a multi-functional component that combines these roles, the patent eliminates the need for additional VCO replicas and simplifies the overall CDR circuit architecture while maintaining burst mode locking capability.
3Adaptability or versatility
If injection lock CDR with complicated injection scheme is used, then burst mode operation is achieved, but additional replica of voltage controlled oscillator based on phase locked loop is needed
Solution Approach 1:
The patent extracts and eliminates the unnecessary PLL-based VCO replica from the injection lock CDR scheme. By optimizing the injection-locked oscillator design with proper feedback control, the system achieves burst mode operation capability without requiring the additional oscillator replica. The feedback mechanism within the ILO itself provides the necessary frequency control, making the external PLL replica redundant.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed solution enhances locking stability and tolerance to jitter, reducing power consumption and area requirements by effectively compensating for phase errors and maintaining frequency alignment with the input data rate, even under temperature and voltage variations.
Implementation Method 1
An injection locked oscillator is coupled to the input data and configured to generate a recovered clock signal
Implementation Method 2
The injection locked oscillator comprises a two stage ring oscillator
Data Source
AI summary
A clock and data recovery circuit includes a sampler, a skew compensation block, a pulse generator, and an injection locked oscillator. The injection locked oscillator generates a recovered clock signal, the pulse generator generates a pulse signal according to input data for controlling the injection locked oscillator, the skew compensation block compensates the input data and generate compensated data, and the sampler samples the compensated data according to the recovered clock signal.


