Injection-Locked CDR Phase Control for FRF Ratio Stability
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Solution Overview
Problem
Injection-locked oscillator-based clock-data recovery (ILO-based CDR) in short-reach data links faces challenges in maintaining the correct ratio of free-running frequency to data rate, leading to large FRF errors due to PVT drift and poor tracking performance, especially with data patterns containing long runs of consecutive identical digits, and existing solutions either require significant additional die area and power or suffer from inaccurate frequency tracking due to residual phase errors.
Innovation Solution
A method and circuitry for controlling the phase and free-running frequency of an injection-locked oscillator by measuring the input data signal at specific clock edges and centers to adjust a variable data path delay and oscillator frequency based on predetermined relationships, eliminating duty-cycle distortion and reducing inter-symbol interference, thereby maintaining the FRF-to-data rate ratio and improving tracking accuracy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If ILO-based CDR is used in short-reach data links, then low channel loss is achieved, but the ratio of oscillator free-running frequency to data rate cannot be maintained constant due to PVT drift
Solution Approach 1:
The patent implements a feedback mechanism where the measured data signal is compared with the oscillator output, and the phase detector generates correction signals based on the difference. This feedback loop continuously adjusts the oscillator frequency to maintain the correct ratio despite PVT drift, resolving the contradiction between low channel loss and frequency ratio stability.
Solution Approach 2:
The patent replaces traditional mechanical frequency stabilization methods with electronic measurement and control. By using a phase detector and digital signal processing to measure and correct frequency deviations, the system achieves frequency ratio stability without mechanical components, suitable for integrated circuit implementation.
2Productivity
If traditional phase detection methods are used, then frequency tracking is implemented, but residual phase errors cause poor tracking performance
Solution Approach 1:
The patent applies preliminary action by measuring the data signal at multiple predetermined points (including intermediate points between clock edges) before making frequency correction decisions. This advance measurement at multiple points allows the system to predict and correct phase errors more accurately, eliminating residual phase errors that plague traditional single-point phase detection methods.
3Reliability
If additional circuits are added to improve frequency tracking, then tracking performance is enhanced, but die area and power consumption increase significantly
Solution Approach 1:
The patent achieves multi-functionality by using the same measurement circuitry and phase detector for both phase alignment and frequency tracking. The measured data signal serves multiple purposes: it is used for phase error detection, frequency ratio verification, and generating correction signals. This universal approach enhances tracking performance without requiring separate dedicated circuits, thus avoiding significant increases in die area and power consumption.
Data Source
AI summary
A clock-data recovery circuit includes a variable data path delay, an injection-locked oscillator having a free-running frequency, and circuitry for adjusting at least one of the variable data path delay and the free-running frequency, including a counter configured to count repetitions of a bit value in an input data signal, and further being configured to, on occurrence of a first data pattern in the input data signal, indicative of saturation of inter-symbol interference, measure the input data signal at a first clock edge to determine a first data phase measurement value, measure the input data signal at clock centers immediately preceding and immediately following the first clock edge to determine second and third data phase measurement values, and based on first predetermined relationships among the first, second and third data phase measurement values, adjust the variable data path.