Inkjet Head Chip Identification Circuit with Anti-Fuse and EPROM Memory
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Solution Overview
Problem
Current inkjet head chip identification circuits rely solely on fuses for information recording, which are vulnerable to reverse engineering, leading to intellectual property infringement and economic losses, and lack flexibility for data modification.
Innovation Solution
The proposed solution enhances the inkjet head chip identification circuit by incorporating an array structure of memory units with a combination of MOSFET-Anti-Fuse and EPROM, allowing for more detailed and secure information recording, including serial numbers, ink types, and usage data, while maintaining low manufacturing costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If fuses are used for information recording in inkjet head chip identification circuits, then the structure remains simple and manufacturing cost is low, but the security against reverse engineering is insufficient and data recording flexibility is limited
Solution Approach 1:
The patent combines multiple memory technologies (fuses, transistor-anti-fuses, and EPROM) into a unified identification circuit system. This merging allows the circuit to leverage the security advantages of blown fuses, the programmability of transistor-anti-fuses, and the reprogrammability of EPROM, thereby enhancing overall data security and flexibility without requiring complete structural redesign
Solution Approach 2:
The identification circuit is designed to perform multiple functions using different memory technologies for different data types. Critical security data uses blown fuses, programmable data uses transistor-anti-fuses, and updateable data uses EPROM. This multi-functionality approach allows a single circuit to address both security concerns and flexibility requirements simultaneously
2Adaptability or versatility
If fuses are used for information recording, then manufacturing cost is kept low, but the ability to modify data after manufacturing is lost
Solution Approach 1:
The identification circuit is segmented into distinct memory regions with different characteristics: fuse elements for immutable critical data, transistor-anti-fuse elements for programmable data, and EPROM elements for reprogrammable data. This segmentation allows each portion to be optimized for its specific function while maintaining overall cost-effectiveness and manufacturing simplicity
Solution Approach 2:
The patent utilizes different physical states and electrical characteristics of various memory elements to achieve data storage. By changing parameters such as resistance state (blown vs. unblown fuses, programmed vs. unprogrammed transistor-anti-fuses) and charge state (EPROM cells), the circuit achieves both low-cost manufacturing and flexible data modification capabilities across different data types
3Loss of information
If only fuses are used for data storage, then the circuit structure remains simple, but the amount of information that can be recorded is insufficient for sophisticated printing functions
Solution Approach 1:
The patent merges multiple memory technologies (fuses, transistor-anti-fuses, and EPROM) into a unified identification circuit system. This merging allows the circuit to leverage the security advantages of blown fuses, the programmability of transistor-anti-fuses, and the reprogrammability of EPROM, thereby enhancing overall data security and flexibility without requiring complete structural redesign
Solution Approach 2:
The identification circuit is designed to perform multiple functions using different memory technologies for different data types. Critical security data uses blown fuses, programmable data uses transistor-anti-fuses, and updateable data uses EPROM. This multi-functionality approach allows a single circuit to address both security concerns and flexibility requirements simultaneously
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach increases data recording flexibility and security, making it difficult to counterfeit the inkjet head chip through reverse engineering, thereby protecting intellectual property and enhancing user and manufacturer rights.
Implementation Method 1
The memory units 100 can control whether the fuse 130 is blown or not to transmit a transmission signal with the high potential or the low potential and represent the information in each bit in the memory units 100
Implementation Method 2
when the data terminal 120 provides a high potential, the transistor device 140 is operated in a conductive state
Data Source
AI summary
An inkjet head chip identification circuit is disclosed and includes an identification circuit matching with a printer so that the printer provides an inkjet head chip with required information according to the matching result. The identification circuit includes plural memory units. The memory units arranged in an array structure and include a first transistor, a third transistor, a fuse or a combination thereof. By burning the elements in the array structure or not, a data signal of each memory unit is read. The first transistor is a MOSFET-Anti-Fuse. The third transistor is an EPROM. The first transistor, the third transistor and the fuse are formed on the same inkjet head chip.