Inkjet Print Head Shared Data Lines for Memory Integration

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Solution Overview

Problem

The existing manufacturing processes for inkjet print heads are costly and prone to data cloning due to the separate fabrication of nozzle arrays and non-volatile memory cell arrays, which increases silicon area usage and makes attribute data vulnerable to reverse engineering.

Innovation Solution

Integrating non-volatile memory cells onto the same chip as the nozzle arrays in a single fabrication technology, using shared data signal lines for both arrays, and employing random access addressing to store and manage print head attributes efficiently, reducing the need for additional silicon area and preventing data cloning.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If non-volatile memory cell arrays are fabricated separately from nozzle arrays, then each array can be optimized independently, but manufacturing costs increase and silicon area usage increases

Engineering Contradiction:
Improvearray optimizationVSAvoidmanufacturing cost
Core Design Contradiction:
Manufacturing precisionVSEase of manufacture

Solution Approach 1:

The patent merges the fabrication of non-volatile memory cell arrays and nozzle arrays into a single integrated chip using the same fabrication process. This consolidation eliminates the need for separate manufacturing steps and reduces overall silicon area usage while maintaining the functional optimization of both array types through unified design.

Inventive Principle:
Principle #5Merging (Combining)

2Ease of manufacture

If separate fabrication processes are used for memory and nozzle arrays, then process optimization is easier, but data security against reverse engineering deteriorates

Engineering Contradiction:
Improveprocess optimizationVSAvoiddata cloning vulnerability
Core Design Contradiction:
Ease of manufactureVSObject-affected harmful factors

Solution Approach 1:

By integrating both arrays onto the same chip with identical fabrication processes, the patent creates a unified structure that is more resistant to reverse engineering. The merged architecture eliminates the interfaces and packaging layers between separate components, making it more difficult for attackers to extract and clone attribute data without damaging the chip.

Inventive Principle:
Principle #5Merging (Combining)

3Measurement precision

If additional data signal lines are added for memory cell addressing, then memory access precision improves, but device complexity and silicon area increase

Engineering Contradiction:
Improvememory access precisionVSAvoidsignal line quantity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent implements multi-functional data signal lines that serve dual purposes: controlling the nozzle array and addressing memory cells. By making the data lines universal rather than dedicated to single functions, the system achieves precise memory access without requiring additional signal lines, thereby reducing overall device complexity and silicon area.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS9987841B2Inkjet print head with shared data lines
Publication Date: 2018.06.05 HEWLETT PACKARD DEVELOPMENT COMPANY LP
  • US9987841B2 patent drawing
  • US9987841B2 patent drawing
  • US9987841B2 patent drawing

AI summary

An inkjet print head includes data signal lines configured to supply inkjet control voltages and non-volatile memory cell random access addresses. The inkjet print head includes an inkjet nozzle array wherein each nozzle in the array is configured to communicate with a data signal line. Also a non-volatile attribute memory cell array is included in the inkjet print head wherein each memory cell in the array is accessed through a data signal line shared with the nozzle array.