Inline Circuit Editing With Maskless e-Beam Lithography

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Solution Overview

Problem

Current lithographic processing technologies are inefficient for inline circuit edits, requiring weeks to months for each edit iteration due to the need for new mask fabrication, which disrupts production and limits flexibility in making design changes across a wafer and field.

Innovation Solution

Implementing maskless e-beam lithography for inline circuit editing, allowing for real-time edits of existing patterns without interrupting production, using electron-beam lithography to add or remove features directly on the wafer, reducing the need for new masks and accelerating the logic/debug loop.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If conventional lithographic processing is used for circuit edits, then manufacturing precision is maintained, but productivity deteriorates due to weeks to months required for mask fabrication and production disruption

Engineering Contradiction:
Improvecircuit edit speedVSAvoidturnaround time for edits
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent extracts the lithography process from the mask dependency by implementing maskless lithography systems. The lithography apparatus performs circuit edits directly on wafers using electron beams or other radiation sources without requiring physical mask fabrication, thereby eliminating the time-consuming mask production and replacement steps while maintaining pattern transfer precision

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The system performs preliminary circuit editing actions directly on the wafer during the lithography process itself. By using programmable beam patterns and real-time control, the system can make design changes, add features, or modify circuits before subsequent processing steps, eliminating the need for iterative mask fabrication cycles

Inventive Principle:
Principle #10Preliminary action

2Ease of manufacture

If new masks are fabricated for each circuit edit, then manufacturing precision is ensured, but device complexity increases due to additional mask fabrication and handling steps

Engineering Contradiction:
Improvecircuit edit process simplicityVSAvoidmask fabrication infrastructure
Core Design Contradiction:
Ease of manufactureVSDevice complexity

Solution Approach 1:

The lithography apparatus is designed with multi-functionality to perform both standard lithography and circuit editing operations. The system uses programmable beam control and software-defined patterns to achieve various circuit modifications (additions, deletions, modifications) using the same hardware platform, eliminating the need for separate mask fabrication infrastructure and simplifying the manufacturing process

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The system creates digital copies of circuit patterns through software and programmable control rather than physical mask copies. The lithography apparatus uses stored design data and beam steering to reproduce circuit patterns directly on wafers, eliminating the need for physical mask fabrication, storage, and handling while maintaining pattern fidelity

Inventive Principle:
Principle #26Copying

3Productivity

If maskless e-beam lithography is implemented, then productivity is improved by eliminating mask fabrication, but manufacturing precision may deteriorate due to direct beam writing limitations

Engineering Contradiction:
Improveedit iteration speedVSAvoidpattern accuracy
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The patent replaces the mechanical mask fabrication and physical mask handling system with an electron beam-based direct writing system. The e-beam lithography apparatus uses controlled electron beams guided by electromagnetic fields and software to write patterns directly on photoresist-coated wafers, eliminating mechanical mask dependencies while achieving high precision through beam focusing and positioning control

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The system achieves precision by dynamically controlling multiple parameters including electron beam energy, beam current, scanning speed, and focal position. The lithography apparatus adjusts these parameters in real-time during the writing process to optimize pattern resolution and edge accuracy, compensating for the lack of physical masks through precise parameter management

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach significantly reduces turnaround time for prototyping and fixing design errors, enabling parallel testing of multiple solutions on a single wafer and enhancing productivity by eliminating the need for new mask fabrication, thus speeding up data turns and reducing production time.

Implementation Method 1

maskless e-beam lithography for inline circuit editing

Methodology Applied
Scientific EffectElectron Beam: Electron Beam

Data Source

PatentUS20230369207A1Inline circuit edit
Publication Date: 2023.11.16 INTEL CORP
  • US20230369207A1 patent drawing
  • US20230369207A1 patent drawing
  • US20230369207A1 patent drawing

AI summary

Lithographic methodologies involving, and apparatuses suitable for, inline circuit edits are described. In an example, an integrated circuit structure includes a first conductive line and a second conductive line in a first dielectric layer, the second conductive line laterally spaced apart from the first conductive line. The integrated circuit structure also includes a first conductive via and a second conductive via in a second dielectric layer, the second dielectric layer over the first dielectric layer, the second conductive via laterally spaced apart from the first conductive via, the first conductive via vertically over and connected to the first conductive line, and the second conductive via vertically over but separated from the second conductive line.