Inline Encryption Controller for NVMe Data Security
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Solution Overview
Problem
Existing storage encryption methodologies face challenges in implementing inline encryption for NVMe drives, particularly due to the lack of metadata transmission in the DMA path, which hinders the encryption and decryption processes, and the inability to parse command packets within the System on Chip (SoC).
Innovation Solution
An inline cryptographic controller is integrated within the SoC, capable of generating command streams and tweak tables to facilitate encryption and decryption at line speeds, using the PCIe protocol, and employing AES-XTS and AES-GCM algorithms for secure data storage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If inline encryption is implemented for NVMe drives, then data security is improved, but the complexity of the system increases due to lack of metadata transmission in DMA path
Solution Approach 1:
The patent introduces a cryptographic controller as an intermediary component within the SoC that mediates between the NVMe drive and the system memory. This controller intercepts DMA transactions, performs encryption/decryption operations, and manages key distribution without requiring changes to the existing NVMe protocol or DMA path. The cryptographic controller acts as a transparent mediator that adds security functionality while maintaining system compatibility.
Solution Approach 2:
The cryptographic controller is nested within the System on Chip (SoC) architecture, integrating encryption functionality directly into the existing system fabric. The controller is positioned within the DMA path but operates as a separate functional unit, allowing it to process encryption/decryption without disrupting the main data flow. This nested integration enables security functionality to be embedded within the existing system structure rather than adding external complexity.
2Reliability
If encryption operations are performed inline, then data protection is improved, but processing speed may be reduced due to additional encryption/decryption steps
Solution Approach 1:
The cryptographic controller is designed to perform encryption and decryption operations continuously as data flows through the DMA path, without interrupting or pausing the data transfer. The controller processes encryption/decryption in parallel with the DMA transfer operation, maintaining continuous data flow from NVMe drive to system memory. This continuous processing ensures that security operations do not become bottlenecks in the data path.
Solution Approach 2:
The patent replaces software-based encryption mechanisms with hardware-based cryptographic operations performed by dedicated encryption engines within the cryptographic controller. This hardware substitution eliminates the overhead of software processing and allows encryption/decryption to occur at line speed, matching the performance of the underlying storage device. The hardware implementation uses cryptographic accelerators that can process multiple blocks of data simultaneously.
3Adaptability or versatility
If metadata transmission is enabled in DMA path for encryption support, then encryption capability is improved, but protocol complexity increases
Solution Approach 1:
The patent extracts the metadata management functionality from the DMA path itself and relocates it to the cryptographic controller. Instead of requiring metadata to be transmitted through the DMA protocol, the controller generates and manages all necessary encryption metadata (keys, initialization vectors, authentication tags) internally. This extraction eliminates the need to modify the NVMe DMA protocol while still providing full encryption capability.
Solution Approach 2:
The cryptographic controller creates and manages copy of the encryption metadata internally rather than requiring original metadata to be transmitted through the DMA path. The controller generates local copies of keys and cryptographic parameters that it uses for encryption operations, eliminating the need for complex metadata transmission protocols while maintaining full encryption functionality.
4Extent of automation
If command packet parsing is performed in SoC, then encryption control is improved, but processing overhead increases
Solution Approach 1:
The cryptographic controller performs preliminary parsing of NVMe command packets to identify encryption-relevant information (such as logical block addresses and data directions) before the actual encryption operation begins. By extracting and processing only the necessary metadata fields in advance, the controller prepares encryption parameters ahead of time, allowing the main encryption operation to proceed without repeated parsing overhead.
Data Source
AI summary
Examples of support for an instruction allowing for the binding of a platform key to a binary large object (BLOB) are described. In some examples, support is in the form of decoder circuitry to decode an instance of a single instruction, the instance of the single instruction to include an opcode that is to indicate to execution circuitry to perform a binding of information to a platform by encrypting at least a portion of information of an input data structure with a platform-specific wrapping key; and execution circuitry to execute the decoded instance of the single instruction according to the opcode to generate and store an output data structure.