Inline High-Level Code Compilation for Lightweight CPUs
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Solution Overview
Problem
Configurable logic integrated circuits face inefficiencies due to the large memory overhead of compiled C programs and the time-consuming process of writing and debugging assembly code, as standard embedded compilers for high-level programming languages like C are not optimized for lightweight CPUs.
Innovation Solution
Implementing an assembler that compiles inline high-level programming languages, such as C, directly into assembly code for configurable logic integrated circuits, allowing for the combination of multiple instructions into a single instruction word and eliminating the need for variable declarations, thereby reducing memory usage and improving processing efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If standard embedded compilers are used to compile C programs for lightweight CPUs, then high-level programming language support is achieved, but memory overhead becomes excessively large
Solution Approach 1:
The patent segments the compilation process into two distinct phases: a compilation phase that translates C code to assembly language, and an execution phase that runs the assembled code on the lightweight CPU. This segmentation allows the system to use high-level C programming while avoiding the full overhead of standard C compilers by using a simpler, purpose-built compiler tailored for the specific CPU architecture.
2Productivity
If assembly code is used directly for configurable logic integrated circuits, then processing efficiency is improved, but writing and debugging becomes time-consuming
Solution Approach 1:
The patent introduces an intermediary compiler tool that translates high-level C code into assembly language suitable for the lightweight CPU. This intermediary tool bridges the gap between the ease of C programming and the efficiency of assembly code execution, allowing developers to write C code while automatically generating optimized assembly output without manual assembly programming or debugging.
3Quantity of substance
If multiple instructions are combined into one instruction word, then memory usage is reduced, but instruction complexity increases
Solution Approach 1:
The patent merges multiple simple assembly instructions into single compact instruction words that can be executed by the lightweight CPU. This merging reduces the total number of instructions and memory requirements while maintaining simplicity in the instruction set design, as each combined instruction word represents a straightforward sequence of operations without complex control logic.
Data Source
AI summary
A processor circuit includes a compiler configured to receive a software program that comprises software code coded in an assembly language and inline software code coded in a high-level programming language, compile the inline software code coded in the high-level programming language within the software program into assembly code in the assembly language, and compile the assembly code and the software code coded in the assembly language into machine code for the processor circuit. A method includes determining if first and second instructions in a software program are combinable into one instruction word, combining the first and the second instructions in the software program into one instruction word if the first and the second instructions are combinable, and fetching the instruction word into a single register by storing the instruction word in the single register.