In-Line Lithography Etch System Site-Dependent Processing

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Solution Overview

Problem

Current wafer processing methodologies face challenges in achieving real-time, site-dependent processing and evaluation due to the lack of integrated site-dependent (S-D) transfer and processing subsystems, leading to inefficiencies and defects in semiconductor manufacturing, particularly at the 15 nm gate technology node where precise control and minimal wafer movement are critical.

Innovation Solution

The implementation of a method and apparatus for real-time site-dependent processing and evaluation using S-D transfer and processing sequences, which involve controllers and subsystems to optimize wafer processing by utilizing historical and real-time data for site-dependent parameters, enabling dynamic adjustment of processing sequences to maximize throughput and minimize defects.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If wafer processing is performed using distributed stand-alone platforms separated by 2000 feet or more, then each platform can function independently, but wafer movement between tools adds defects and increases factory clean room cost

Engineering Contradiction:
Improvedefect reductionVSAvoidsystem integration
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent combines multiple distributed processing platforms (coater, scanner, etcher, metrology tools) into an integrated in-line processing system where wafers are processed sequentially without removal. This merging eliminates the need for wafer transport between separate tools, thereby reducing defect introduction from handling and environmental exposure while maintaining independent functional capabilities of each processing module.

Inventive Principle:
Principle #5Merging (Combining)

2Manufacturing precision

If real-time wafer-to-wafer upstream adjustment is implemented, then acceptable device results are maintained, but processing complexity and data handling requirements increase

Engineering Contradiction:
Improvedevice result controlVSAvoidprocess control system
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent implements real-time feedback mechanisms where metrology measurements taken during processing are immediately used to adjust subsequent processing parameters for the next wafer. The system continuously monitors critical dimensions and other process variables, then dynamically modifies exposure, etching, or coating parameters to compensate for variations, maintaining precise device results through closed-loop control without requiring complex external intervention.

Inventive Principle:
Principle #23Feedback

3Manufacturing precision

If multiple operations are repeated to complete a single active layer (double BARC, double or triple patterning), then sub 32 nm gate lengths are achieved, but processing time and potential defect opportunities increase

Engineering Contradiction:
Improvegate length controlVSAvoidprocessing throughput
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

The patent enables continuous processing where wafers undergo multiple operations (BARC coating, patterning, etching) in an uninterrupted in-line sequence without removal from the system. Each processing module operates continuously on the moving wafer stream, eliminating idle transport time between tools and ensuring that the repeated operations required for sub-32nm fabrication occur in a continuous, efficient manner that maximizes throughput while maintaining precision.

Inventive Principle:
Principle #20Continuity of useful action

Data Source

PatentUS7842519B2In-line lithography and etch system
Publication Date: 2010.11.30 TOKYO ELECTRON LTD
  • US7842519B2 patent drawing
  • US7842519B2 patent drawing
  • US7842519B2 patent drawing

AI summary

The invention can provide a method of processing a wafer using Site-Dependent (S-D) processing sequences that can include S-D creation procedures, S-D evaluation procedures, and S-D transfer sequences. The S-D creation procedures can be performed using S-D processing elements, the S-D evaluation procedures can be performed using S-D evaluation elements, and S-D transfer sequences can be performed using site-dependent transfer subsystems. Site-dependent data can be stored in site-dependent libraries and/or databases.