Inline Part Average Testing for Latent Defect Detection
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Solution Overview
Problem
Existing semiconductor manufacturing processes fail to detect latent reliability defects effectively, leading to premature failures in high-reliability applications, as current inspection and metrology methods only achieve part-per-million (PPM) defect control, falling short of the required part-per-billion (PPB) levels needed for risk-averse industries like automotive and medical.
Innovation Solution
The implementation of inline part average testing (I-PAT) methods and systems that aggregate inspection and metrology results from multiple critical steps during wafer fabrication, identify statistical outliers, and disqualify or segregate them for further evaluation, using a combination of inline defect inspection tools, metrology, and statistical data to predict latent reliability defects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If traditional inspection and metrology methods are used, then manufacturing process control is maintained, but latent reliability defects cannot be detected at PPB levels
Solution Approach 1:
The patent segments the inspection process into multiple independent statistical tests (within-lot, between-lot, and trend analyses) that each evaluate specific aspects of wafer quality. By dividing the overall inspection into these discrete statistical components, the system can detect subtle latent defects at PPB levels without requiring a complete overhaul of the inspection methodology.
Solution Approach 2:
The patent performs statistical analysis and outlier identification during the manufacturing process itself, before wafers enter the supply chain. By conducting within-lot and between-lot comparisons proactively, the system identifies and isolates potential reliability issues before they can cause premature field failures.
2Reliability
If statistical outlier identification is implemented to detect latent defects, then reliability improves, but inspection process complexity increases
Solution Approach 1:
The patent implements feedback loops where statistical results from within-lot and between-lot analyses feed into subsequent inspection and decision-making processes. The system continuously monitors process parameters, compares them against statistical norms, and adjusts inspection intensity based on identified outliers, creating a self-regulating complexity management system.
Solution Approach 2:
The patent changes the statistical parameters being measured from simple pass/fail criteria to multi-dimensional statistical distributions. By analyzing wafer parameters against within-lot and between-lot statistical norms rather than fixed thresholds, the system detects latent defects through parameter variations without requiring complex physical inspection modifications.
3Measurement precision
If all wafers undergo extensive inspection at every critical step, then defect detection improves, but productivity decreases
Solution Approach 1:
The patent applies partial inspection intensity to different wafer populations based on statistical risk assessment. Wafers identified as statistical outliers receive enhanced inspection and segregation, while conforming wafers proceed through the process with standard inspection. This partial application of intensive inspection maintains productivity while detecting latent defects in at-risk portions of the batch.
Solution Approach 2:
The patent segments the wafer population into different risk categories through statistical analysis (within-lot outliers, between-lot outliers, trend deviations). By segmenting wafers based on their statistical risk profiles rather than inspecting all wafers uniformly, the system concentrates inspection resources on high-risk portions while maintaining throughput for low-risk wafers.
Data Source
AI summary
Methods and systems for inline parts average testing and latent reliability defect recognition or detection are disclosed. An inline parts average testing method may include: performing inline inspection and metrology on a plurality of wafers at a plurality of critical steps during wafer fabrication; aggregating inspection results obtained from inline inspection and metrology utilizing one or more processors to obtain a plurality of aggregated inspection results for the plurality of wafers; identifying one or more statistical outliers among the plurality of wafers at least partially based on the plurality of aggregated inspection results obtained for the plurality of wafers; and disqualifying the one or more statistical outliers from entering a supply chain for a downstream manufacturing process, or segregating the one or more statistical outliers for further evaluation, testing or repurposing.