Inline Safety Cache for ASIL-D Memory Path Error Detection
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Solution Overview
Problem
Conventional approaches for achieving Automotive Safety Integrity Level (ASIL)-D ratings in automotive systems are costly, time-consuming, and inefficient, due to the need for meticulous design and rigorous testing of each component along the data path, and fail to meet higher safety integrity requirements when some components have lower ratings.
Innovation Solution
An inline safety mechanism with a cache that includes a meta cache and error detection capabilities, allowing for end-to-end ASIL-D safety protection by generating short codes for data transactions and comparing them with fetched data to detect and correct errors, even in components with lower safety ratings.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional approaches are used to achieve ASIL-D ratings by meticulously designing and testing each component, then safety integrity is improved, but development cost and time increase significantly
Solution Approach 1:
The patent introduces an intermediary safety mechanism that sits between upstream ASIL-D components and downstream lower-ASIL components. This intermediary layer provides ASIL-D protection for the entire data path without requiring each downstream component to be individually designed and tested to ASIL-D standards, thereby reducing development time while maintaining safety integrity.
Solution Approach 2:
The system segments the data path into upstream ASIL-D components, downstream lower-ASIL components, and an intermediary safety mechanism. This segmentation allows different safety levels to coexist in the same system, with the intermediary mechanism bridging the gap and providing overall ASIL-D protection without requiring complete redesign of all components.
2Reliability
If conventional approaches are used to achieve ASIL-D ratings with meticulous design and testing, then safety integrity is improved, but development cost increases
Solution Approach 1:
The intermediary safety mechanism serves as a cost-effective solution by providing ASIL-D protection through a dedicated safety layer rather than requiring expensive redesign and retesting of all downstream components. This approach significantly reduces development cost while maintaining the required safety integrity level.
Solution Approach 2:
The safety mechanism is designed to be universal and can be applied to protect data paths with mixed ASIL ratings. It provides multi-functional protection including error detection, correction, and system integrity verification, replacing the need for component-specific safety implementations and reducing overall development cost.
3Reliability
If downstream components are designed to ASIL-D standards, then safety protection is improved, but design area and power dissipation increase
Solution Approach 1:
The intermediary safety mechanism provides compact ASIL-D protection in a dedicated layer between upstream and downstream components. This approach requires significantly less design area than redesigning all downstream components to ASIL-D standards, as the safety mechanism is optimized for its specific protective function rather than general-purpose high-performance computing.
Solution Approach 2:
The system applies different quality levels to different parts of the data path: upstream components maintain their ASIL-D design, downstream components operate at lower ASIL levels with reduced design area, and the intermediary safety mechanism provides localized ASIL-D protection where needed. This local quality approach optimizes the overall design area while maintaining required safety protection.
4Reliability
If downstream components are designed to ASIL-D standards, then safety protection is improved, but power dissipation increases
Solution Approach 1:
The intermediary safety mechanism provides energy-efficient ASIL-D protection by implementing safety functions in a dedicated layer rather than requiring all downstream components to operate at ASIL-D power levels. This approach significantly reduces overall power dissipation while maintaining the required safety protection level for the data path.
Solution Approach 2:
The system applies different power consumption characteristics to different parts of the data path: upstream ASIL-D components operate at higher power levels, downstream lower-ASIL components operate at reduced power levels, and the intermediary safety mechanism provides localized protection with optimized power consumption. This local quality approach reduces total system power dissipation while maintaining required safety protection.
Data Source
AI summary
An apparatus includes a central processing unit (CPU) coupled to a system-on-a-chip (SOC) interconnect. The apparatus also includes multiple logic structures coupled to a memory. The apparatus further includes a safety mechanism coupled to and inline with the memory, the logic structures, and the CPU via the SOC interconnect. The safety mechanism comprises a meta cache and is configured to detect errors in one or more of the logic structures and the memory.