In-Memory Compression for Sparse Matrix Processing
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Solution Overview
Problem
Current graphics processing systems face inefficiencies in processing sparse matrix operations and compressing real integer data, particularly in deep learning applications, due to limitations in data transfer and processing capabilities.
Innovation Solution
A compression mechanism is introduced that maps real integer data into larger blocks for compression and performs sparse matrix operations within memory, utilizing high-bandwidth memory with integrated processing units to reduce data transfer and enhance processing efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If sparse matrix operations are performed using traditional graphics processing systems, then processing can be done with existing hardware, but data transfer requirements are large and processing efficiency is low
Solution Approach 1:
The patent implements processing units directly within the memory structure, creating a nested configuration where computation resources are embedded inside the memory hierarchy. This allows sparse matrix operations to be performed in-place without requiring data to be transferred to separate processing units, thereby reducing data transfer volume while maintaining high processing efficiency
Solution Approach 2:
The patent introduces a new dimensional aspect to memory architecture by integrating processing capabilities within the memory structure itself, transforming the traditional separate memory-processing unit model into a unified in-memory computing system. This dimensional change enables simultaneous data storage and processing, eliminating the need for repeated data transfers between memory and processing units
2Productivity
If real integer data is compressed using traditional methods, then compression can be performed with standard processing, but processing speed is limited and data transfer overhead remains high
Solution Approach 1:
The patent embeds compression logic directly within the memory structure, allowing real integer data to be compressed in-place during storage operations. This eliminates the need for separate compression processing steps and reduces data transfer overhead, as data is compressed where it is stored rather than being transferred to and from external processing units
Solution Approach 2:
The patent performs compression operations as data is being written to memory, rather than as a separate post-processing step. This preliminary compression action reduces the volume of data that needs to be transferred and stored, improving both compression speed and reducing data transfer overhead simultaneously
Data Source
AI summary
An apparatus to facilitate compute compression is disclosed. The apparatus includes a graphics processing unit including mapping logic to map a first block of integer pixel data to a compression block and compression logic to compress the compression block.


