Inner Gate Spacer Structure for Scaled MOSFET Reliability
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The scaling down of metal oxide semiconductor field effect transistors (MOSFETs) in semiconductor devices leads to deterioration in operational properties, necessitating improved reliability and electrical characteristics.
Innovation Solution
The semiconductor device design includes a substrate with active patterns, channel patterns, source/drain patterns, and a gate electrode with an inner gate spacer that has a center portion and edge portions of varying thicknesses, along with an inner high-k dielectric layer, to enhance electrical performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If MOSFETs are scaled down to meet increasing demand for smaller pattern size, then device density and integration are improved, but operational properties and reliability deteriorate
Solution Approach 1:
The patent applies local quality by creating a non-uniform inner gate spacer with varying thickness (thicker center portion, thinner edge portions) to provide different levels of protection and electrical characteristics in different regions of the gate structure, thereby maintaining reliability while enabling scaled-down device dimensions
Solution Approach 2:
The patent uses composite materials by combining the inner gate spacer with an inner high-k dielectric layer between the inner gate electrode and source/drain patterns, creating a multi-layered gate insulating structure that provides both mechanical support and enhanced electrical isolation to improve reliability at scaled dimensions
2Ease of manufacture
If the inner gate spacer has uniform thickness, then manufacturing is simplified, but electrical characteristics and leakage current control deteriorate
Solution Approach 1:
The inner gate spacer is designed with local quality variations where the center portion has a first thickness and the edge portions have a second thickness (different from the center), allowing optimized electrical characteristics and leakage current control in different regions while maintaining a manufacturable structure through selective etching processes
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design improves the electrical characteristics and reliability of semiconductor devices by optimizing the thickness and structure of the inner gate spacer and high-k dielectric layer, leading to better gate electrode formation and reduced leakage current.
Implementation Method 1
an inner high-k dielectric layer between the inner gate electrode and the inner gate spacer
Data Source
AI summary
A semiconductor device comprising: a substrate including an active pattern; a channel pattern on the active pattern, wherein the channel pattern includes a plurality of semiconductor patterns; a source/drain pattern connected to the plurality of semiconductor patterns; a gate electrode extending in a first direction on the channel pattern, wherein the gate electrode includes an inner gate electrode between first and second semiconductor patterns among the plurality of semiconductor patterns; and an inner gate spacer between the inner gate electrode and the source/drain pattern, wherein the inner gate spacer includes a center portion and an edge portion, the center portion has a first thickness in a second direction, the edge portion has a second thickness in the second direction, the first thickness is greater than the second thickness, the first and second semiconductor patterns are adjacent to each other in a third direction.