Inner Spacer Structure Using Oxygen-Free Cyclic Dielectric Etching

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

The challenge in semiconductor manufacturing is the complexity and inefficiency of forming inner spacers for gate-all-around field effect transistors (GAA FETs), particularly due to the use of oxygen-containing etchants that degrade etching rate and uniformity, leading to reduced yield and throughput in integrated circuit (IC) production.

Innovation Solution

An oxygen-free cyclic dry etching process is employed to form inner spacers, utilizing a combination of fluorine and hydrogen radicals to enhance etching rate and selectivity, ensuring precise removal of dielectric layers without damaging the nano-sheet channel layer.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If oxygen-containing etchants are used to form inner spacers, then the etching process can proceed, but the etching rate and uniformity degrade

Engineering Contradiction:
Improveetching rateVSAvoidetching uniformity
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The patent changes the chemical composition parameters of the etchant by eliminating oxygen-containing compounds and using alternative etching chemistries. This parameter change resolves the contradiction by achieving both improved etching rate and enhanced uniformity without the detrimental effects of oxygen-containing etchants on the nano-sheet channel layer

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent creates an inert etching environment by using etchants that do not contain oxygen, preventing unwanted chemical reactions with the nano-sheet channel layer. This inert environment maintains etching uniformity while preserving the integrity of the underlying semiconductor structures

Inventive Principle:
Principle #39Inert atmosphere (Inert environment)

2Reliability

If conventional etching processes are used, then inner spacers can be formed, but yield and throughput are reduced

Engineering Contradiction:
ImproveyieldVSAvoidthroughput
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent modifies the etching process parameters by using oxygen-free etchants and optimized process conditions, which simultaneously improves yield through better selectivity and control while increasing throughput through enhanced etching rate and reduced rework requirements

Inventive Principle:
Principle #35Parameter changes

3Ease of manufacture

If oxygen-containing etchants are used, then etching can occur, but the nano-sheet channel layer integrity is compromised

Engineering Contradiction:
Improveetching capabilityVSAvoidnano-sheet channel layer integrity
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent employs an inert etching environment free from oxygen-containing species, which prevents oxidative damage to the nano-sheet channel layer while maintaining effective etching capability. This resolves the contradiction by enabling manufacturing without compromising device integrity

Inventive Principle:
Principle #39Inert atmosphere (Inert environment)

Solution Approach 2:

The patent uses carefully selected etching chemistries that act as intermediaries, providing the necessary etching function while avoiding direct harmful interactions with the nano-sheet channel layer. These intermediary substances enable the etching process to proceed without damaging the underlying sensitive structures

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This process improves the etching rate and uniformity of inner spacer formation, enhancing the yield and throughput of IC manufacturing by maintaining the integrity of the nano-sheet channel layer.

Implementation Method 1

utilizing a combination of fluorine and hydrogen radicals to enhance etching rate and selectivity

Methodology Applied
Scientific EffectRadical etching: Plasma

Implementation Method 2

utilizing a combination of fluorine and hydrogen radicals to enhance etching rate and selectivity

Methodology Applied
Scientific EffectChemical reactions: Chemical Bonding

Implementation Method 3

performing an oxygen-free cyclic etching process to etch the dielectric layer

Methodology Applied
Scientific EffectSelective etching: Plasma

Data Source

PatentUS20250261436A1Spacer structure for semiconductor device and method for forming the same
Publication Date: 2025.08.14 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20250261436A1 patent drawing
  • US20250261436A1 patent drawing
  • US20250261436A1 patent drawing

AI summary

The present disclosure describes a semiconductor structure and a method for forming the same. The method can include forming a fin structure over a substrate. The fin structure can include a channel layer and a sacrificial layer. The method can further include forming a first recess structure in a first portion of the fin structure, forming a second recess structure in the sacrificial layer of a second portion of the fin structure, forming a dielectric layer in the first and second recess structures, and performing an oxygen-free cyclic etching process to etch the dielectric layer to expose the channel layer of the second portion of the fin structure. The oxygen-free cyclic etching process can include two etching processes to selectively etch the dielectric layer over the channel layer.